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STM32F091xB STM32F091xC Electrical characteristics
99
Figure 25. Recommended NRST pin protection
1. The external capacitor protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the V
IL(NRST)
max level specified in
Table 56: NRST pin characteristics. Otherwise the reset will not be taken into account by the device.
6.3.16 12-bit ADC characteristics
Unless otherwise specified, the parameters given in Table 57 are derived from tests
performed under the conditions summarized in Table 24: General operating conditions.
Note: It is recommended to perform a calibration after each power-up.
V
hys(NRST)
NRST Schmitt trigger voltage
hysteresis
--200-mV
R
PU
Weak pull-up equivalent
resistor
(2)
V
IN
= V
SS
25 40 55 k
V
F(NRST)
NRST input filtered pulse - - - 100
(1)
ns
V
NF(NRST)
NRST input not filtered pulse
2.7 < V
DD
< 3.6 300
(3)
--
ns
2.0 < V
DD
< 3.6 500
(3)
--
1. Data based on design simulation only. Not tested in production.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance is minimal (~10% order).
3. Data based on design simulation only. Not tested in production.
Table 56. NRST pin characteristics (continued)
Symbol Parameter Conditions Min Typ Max Unit
069
5
38
9
''
,QWHUQDOUHVHW
([WHUQDO
UHVHWFLUFXLW

1567

)LOWHU
)
Table 57. ADC characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
DDA
Analog supply voltage for
ADC ON
- 2.4 - 3.6 V
I
DDA (ADC)
Current consumption of
the ADC
(1)
V
DDA
= 3.3 V - 0.9 - mA
f
ADC
ADC clock frequency - 0.6 - 14 MHz
f
S
(2)
Sampling rate 12-bit resolution 0.043 - 1 MHz
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