Datasheet

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STM32F091xB STM32F091xC Electrical characteristics
99
6.3.3 Embedded reset and power control block characteristics
The parameters given in Table 26 are derived from tests performed under the ambient
temperature and supply voltage conditions summarized in Table 24: General operating
conditions.
Table 25. Operating conditions at power-up / power-down
Symbol Parameter Conditions Min Max Unit
t
VDD
V
DD
rise time rate
-
0

µs/V
V
DD
fall time rate 20

t
VDDA
V
DDA
rise time rate
-
0

V
DDA
fall time rate 20

Table 26. Embedded reset and power control block characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
POR/PDR
(1)
1. The PDR detector monitors V
DD
and also V
DDA
(if kept enabled in the option bytes). The POR detector
monitors only V
DD
.
Power on/power down
reset threshold
Falling edge
(2)
2. The product behavior is guaranteed by design down to the minimum V
POR/PDR
value.
1.80 1.88
1.96
(3)
3. Data based on characterization results, not tested in production.
V
Rising edge 1.84
(3)
1.92 2.00 V
V
PDRhyst
PDR hysteresis - - 40 - mV
t
RSTTEMPO
(4)
4. Guaranteed by design, not tested in production.
Reset temporization - 1.50 2.50 4.50 ms
Table 27. Programmable voltage detector characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
PVD0
PVD threshold 0
Rising edge 2.1 2.18 2.26 V
Falling edge 2 2.08 2.16 V
V
PVD1
PVD threshold 1
Rising edge 2.19 2.28 2.37 V
Falling edge 2.09 2.18 2.27 V
V
PVD2
PVD threshold 2
Rising edge 2.28 2.38 2.48 V
Falling edge 2.18 2.28 2.38 V
V
PVD3
PVD threshold 3
Rising edge 2.38 2.48 2.58 V
Falling edge 2.28 2.38 2.48 V
V
PVD4
PVD threshold 4
Rising edge 2.47 2.58 2.69 V
Falling edge 2.37 2.48 2.59 V
V
PVD5
PVD threshold 5
Rising edge 2.57 2.68 2.79 V
Falling edge 2.47 2.58 2.69 V
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