Datasheet
Pinouts and pin descriptions STM32F091xB STM32F091xC
34/128 DocID026284 Rev 4
Table 13. STM32F091xB/xC pin definitions
Pin numbers
Pin name
(function upon
reset)
Pin type
I/O structure
Notes
Pin functions
UFBGA100
LQFP100
UFBGA64
LQFP64
WLCSP64
LQFP48/UFQFPN48
Alternate functions
Additional
functions
B2 1 - - - - PE2 I/O FT TSC_G7_IO1, TIM3_ETR -
A1 2 - - - - PE3 I/O FT TSC_G7_IO2, TIM3_CH1 -
B1 3 - - - - PE4 I/O FT TSC_G7_IO3, TIM3_CH2 -
C2 4 - - - - PE5 I/O FT TSC_G7_IO4, TIM3_CH3 -
D2 5 - - - - PE6 I/O FT TIM3_CH4
WKUP3,
RTC_TAMP3
E2 6 B2 1 B8 1 VBAT S - - Backup power supply
C1 7 A2 2 B7 2 PC13 I/O TC
(1)
(2)
-
WKUP2,
RTC_TAMP1,
RTC_TS,
RTC_OUT
D1 8 A1 3 C8 3
PC14-
OSC32_IN
(PC14)
I/O TC
(1)
(2)
- OSC32_IN
E1 9 B1 4 C7 4
PC15-
OSC32_OUT
(PC15)
I/O TC
(1)
(2)
- OSC32_OUT
F2 10 - - - - PF9 I/O FT TIM15_CH1, USART6_TX -
G2 11 - - - - PF10 I/O FT TIM15_CH2, USART6_RX -
F112C15D85
PF0-OSC_IN
(PF0)
I/O FTf CRS_ SYNC, I2C1_SDA OSC_IN
G113D16E86
PF1-OSC_OUT
(PF1)
I/O FTf I2C1_SCL OSC_OUT
H2 14 E1 7 D7 7 NRST I/O RST
Device reset input / internal reset output
(active low)
H1 15 E3 8 E7 - PC0 I/O TTa
EVENTOUT,
USART6_TX,
USART7_TX
ADC_IN10
J2 16 E2 9 F8 - PC1 I/O TTa
EVENTOUT,
USART6_RX,
USART7_RX
ADC_IN11
J3 17 F2 10 D6 - PC2 I/O TTa
SPI2_MISO, I2S2_MCK,
EVENTOUT, USART8_TX
ADC_IN12
K2 18 G1 11 E6 - PC3 I/O TTa
SPI2_MOSI, I2S2_SD,
EVENTOUT, USART8_RX
ADC_IN13
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