Datasheet
Functional overview STM32F091xB STM32F091xC
26/128 DocID026284 Rev 4
3.18 Serial peripheral interface (SPI) / Inter-integrated sound
interface (I
2
S)
Two SPIs are able to communicate up to 18 Mbit/s in slave and master modes in full-duplex
and half-duplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame size is configurable from 4 bits to 16 bits.
Two standard I
2
S interfaces (multiplexed with SPI1 and SPI2 respectively) supporting four
different audio standards can operate as master or slave at half-duplex communication
mode. They can be configured to transfer 16 and 24 or 32 bits with 16-bit or 32-bit data
resolution and synchronized by a specific signal. Audio sampling frequency from 8 kHz up to
192 kHz can be set by an 8-bit programmable linear prescaler. When operating in master
mode, they can output a clock for an external audio component at 256 times the sampling
frequency.
Single-wire half-duplex communication X X X
IrDA SIR ENDEC block X - -
LIN mode X - -
Dual clock domain and wakeup from Stop mode X - -
Receiver timeout interrupt X - -
Modbus communication X - -
Auto baud rate detection X - -
Driver Enable X X X
1. X = supported.
Table 10. STM32F091xB/xC USART implementation (continued)
USART modes/features
(1)
USART1
USART2
USART3
USART4
USART5
USART6
USART7
USART8
Table 11. STM32F091xB/xC SPI/I
2
S implementation
SPI features
(1)
1. X = supported.
SPI1 and SPI2
Hardware CRC calculation X
Rx/Tx FIFO X
NSS pulse mode X
I
2
S mode X
TI mode X
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