Datasheet

DocID026284 Rev 4 125/128
STM32F091xB STM32F091xC Revision history
127
9 Revision history
Table 82. Document revision history
Date Revision Changes
30-Oct-2014 1 Initial release.
09-Feb-2015 2
Updated:
– Table: HSI oscillator characteristics,
– Figure : HSI oscillator accuracy characterization
results for soldered parts,
– Figure: WLCSP64 wafer level chip size package
mechanical drawing,
– Table: WLCSP64 - 64-pin, 3.347 x 3.585 mm, 0.4 mm
pitch wafer level chip scale package mechanical data,.
Added:
– Figure: WLCSP64 - 64-pin, 3.347 x 3.585 mm,
0.4 mm pitch wafer level chip scale recommended
footprint.
17-Dec-2015 3
Section 2: Description:
– Table 2: STM32F091xB/xC family device features and
peripheral counts- I/O and capacitive channel
numbers corrected
Section 3: Functional overview:
– updated Figure 1: Block diagram (number of AF) and
Figure 2: Clock tree
– Section 3.5.4: Low-power modes - added info. on
comm. peripherals configurable to operate with HSI
– Section 3.13: Touch sensing controller (TSC) -
number of channels corrected
– added number of complementary outputs for the
general purpose and for the advance control timers in
Table 7: Timer feature comparison
– Table 9: STM32F091xB/xC I
2
C implementation -
added 20mA value to Fast Mode Plus output drive
Section 4: Pinouts and pin descriptions:
– Package pinout figures updated (look and feel)
– Figure 7: WLCSP64 package pinout - now presented
in top view
– Table 13: STM32F091xB/xC pin definitions - MCO
moved from additional to alternate functions column
– Table 19: Alternate functions selected through
GPIOF_AFR registers for port F- lines PF4 and PF5
removed
– Section 5: Memory mapping:
– added information on STM32F091xB difference
versus STM32F091xC map in Figure 10
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