Datasheet

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STM32F072x8 STM32F072xB Electrical characteristics
99
All I/Os are CMOS- and TTL-compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in
Figure 22 for standard I/Os, and in Figure 23 for
5 V-tolerant I/Os. The following curves are design simulation results, not tested in
production.
I
lkg
Input leakage
current
(2)
TC, FT and FTf I/O
TTa in digital mode
V
SS
 V
IN
 V
DDIOx
--± 0.1
µA
TTa in digital mode
V
DDIOx
 V
IN
 V
DDA
--1
TTa in analog mode
V
SS
 V
IN
 V
DDA
--± 0.2
FT and FTf I/O
V
DDIOx
 V
IN
 5 V
--10
R
PU
Weak pull-up
equivalent resistor
(3)
V
IN
= V
SS
25 40 55 k
R
PD
Weak pull-down
equivalent
resistor
(3)
V
IN
= - V
DDIOx
25 40 55 k
C
IO
I/O pin capacitance - - 5 - pF
1. Data based on design simulation only. Not tested in production.
2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins. Refer to Table 52:
I/O current injection susceptibility.
3. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
PMOS/NMOS contribution to the series resistance is minimal (~10% order).
Table 53. I/O static characteristics (continued)
Symbol Parameter Conditions Min Typ Max Unit
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