Datasheet

Functional overview STM32F051x4 STM32F051x6 STM32F051x8
26/121 DocID022265 Rev 6
3.18 Serial peripheral interface (SPI) / Inter-integrated sound
interface (I
2
S)
Up to two SPIs are able to communicate up to 18 Mbit/s in slave and master modes in full-
duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode
frequencies and the frame size is configurable from 4 bits to 16 bits.
One standard I
2
S interface (multiplexed with SPI1) supporting four different audio standards
can operate as master or slave at half-duplex communication mode. It can be configured to
transfer 16 and 24 or 32 bits with 16-bit or 32-bit data resolution and synchronized by a
specific signal. Audio sampling frequency from 8 kHz up to 192 kHz can be set by an 8-bit
programmable linear prescaler. When operating in master mode, it can output a clock for an
external audio component at 256 times the sampling frequency.
3.19 High-definition multimedia interface (HDMI) - consumer
electronics control (CEC)
The device embeds a HDMI-CEC controller that provides hardware support for the
Consumer Electronics Control (CEC) protocol (Supplement 1 to the HDMI standard).
This protocol provides high-level control functions between all audiovisual products in an
e
nvironment. It is specified to operate at low speeds with minimum processing and memory
overhead. It has a clock domain independent from the CPU clock, allowing the HDMI_CEC
controller to wakeup the MCU from Stop mode on data reception.
3.20 Serial wire debug port (SW-DP)
An ARM SW-DP interface is provided to allow a serial wire debugging tool to be connected
to the MCU.
Table 11. STM32F051xx SPI/I
2
S implementation
SPI features
(1)
1. X = supported.
SPI1 SPI2
Hardware CRC calculation X X
Rx/Tx FIFO X X
NSS pulse mode X X
I
2
S mode X -
TI mode X X
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