Datasheet

Electrical characteristics STM32F031x4 STM32F031x6
44/106 DocID025743 Rev 6
Typical and maximum current consumption
The MCU is placed under the following conditions:
• All I/O pins are in analog input mode
• All peripherals are disabled except when explicitly mentioned
• The Flash memory access time is adjusted to the f
HCLK
frequency:
– 0 wait state and Prefetch OFF from 0 to 24 MHz
– 1 wait state and Prefetch ON above 24 MHz
• When the peripherals are enabled f
PCLK
= f
HCLK
The parameters given in Table 23Table 23 to Table 27 are derived from tests performed
under ambient temperature and supply voltage conditions summarized in Table 18: General
operating conditions.
Table 23. Typical and maximum current consumption from V
DD
at 3.6 V
Symbol Parameter Conditions f
HCLK
All peripherals enabled All peripherals disabled
Unit
Typ
Max @ T
A
(1)
Typ
Max @ T
A
(1)
25 °C 85 °C 105 °C 25 °C 85 °C 105 °C
I
DD
Supply
current in
Run mode,
code
executing
from Flash
memory
HSE
bypass,
PLL on
48 MHz 18.4 20.0 20.1 20.4 11.4 12.5 12.5 12.6
mA
32 MHz 12.4 13.2 13.2 13.8 7.9 8.3 8.5 8.6
24 MHz 9.9 10.7 10.7 11.0 6.2 6.8 7.0 7.0
HSE
bypass,
PLL off
8 MHz 3.3 3.6 3.8 3.9 2.2 2.6 2.6 2.6
1 MHz 0.8 1.1 1.1 1.1 0.7 0.9 0.9 0.9
HSI clock,
PLL on
48 MHz 18.9 20.9 21.1 21.5 11.7 12.3 12.9 13.1
32 MHz 12.8 13.7 14.2 14.8 8.0 8.7 9.1 9.1
24 MHz 9.7 10.4 11.2 11.3 6.1 6.5 6.7 6.9
HSI clock,
PLL off
8 MHz 3.5 4.0 4.0 4.1 2.4 2.6 2.7 2.7
Supply
current in
Run mode,
code
executing
from RAM
HSE
bypass,
PLL on
48 MHz 17.3 19.7
(2)
19.8 20.0
(2)
10.3 11.2
(2)
11.3 11.7
(2)
32 MHz 11.2 12.5 12.7 12.7 6.7 7.3 7.6 7.6
24 MHz 8.9 10.0 10.1 10.2 5.1 5.5 5.8 5.9
HSE
bypass,
PLL off
8 MHz 2.8 3.1 3.3 3.4 1.7 2.0 2.1 2.1
1 MHz 0.3 0.6 0.6 1.3 0.2 0.5 0.8 0.9
HSI clock,
PLL on
48 MHz 17.4 19.7 20.0 20.2 10.4 11.2 11.3 11.8
32 MHz 11.8 12.8 13.1 13.3 6.8 7.4 7.7 7.9
24 MHz 9.0 10.0 10.1 10.2 5.2 5.7 6.0 6.0
HSI clock,
PLL off
8 MHz 3.0 3.2 3.5 3.6 1.8 2.0 2.2 2.2
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