STM32F031x4 STM32F031x6 ARM®-based 32-bit MCU with up to 32 Kbyte Flash, 9 timers, ADC and communication interfaces, 2.0 - 3.6 V Datasheet - production data Features • Core: ARM® 32-bit Cortex®-M0 CPU, frequency up to 48 MHz LQFP32 7x7 mm UFQFPN32 5x5 mm LQFP48 7x7 mm UFQFPN28 4x4 mm • Memories – 16 to 32 Kbytes of Flash memory – 4 Kbytes of SRAM with HW parity • CRC calculation unit • Reset and power management – Digital and I/Os supply: 2.0 to 3.6 V – Analog supply: VDDA = from VDD to 3.
Contents STM32F031x4 STM32F031x6 Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 ARM®-Cortex®-M0 core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.2 Memories . . . . .
STM32F031x4 STM32F031x6 Contents 3.15 Serial peripheral interface (SPI) / Inter-integrated sound interface (I2S) . 21 3.16 Serial wire debug port (SW-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . .
Contents STM32F031x4 STM32F031x6 6.3.20 7 Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 7.1 LQFP48 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 7.2 LQFP32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 7.3 UFQFPN32 package information . . . . . . . . . . . . .
STM32F031x4 STM32F031x6 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46.
List of tables Table 48. Table 49. Table 50. Table 51. Table 52. Table 53. Table 54. Table 55. Table 56. Table 57. Table 58. Table 59. Table 60. Table 61. Table 62. Table 63. Table 64. Table 65. Table 66. Table 67. Table 68. Table 69. Table 70. 6/106 Downloaded from Arrow.com. STM32F031x4 STM32F031x6 I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . .
STM32F031x4 STM32F031x6 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42.
Introduction 1 STM32F031x4 STM32F031x6 Introduction This datasheet provides the ordering information and mechanical device characteristics of the STM32F031x4/x6 microcontrollers. This document should be read in conjunction with the STM32F0xxxx reference manual (RM0091). The reference manual is available from the STMicroelectronics website www.st.com. For information on the ARM® Cortex®-M0 core, please refer to the Cortex®-M0 Technical Reference Manual, available from the www.arm.com website.
STM32F031x4 STM32F031x6 2 Description Description The STM32F031x4/x6 microcontrollers incorporate the high-performance ARM® Cortex®M0 32-bit RISC core operating at up to 48 MHz frequency, high-speed embedded memories (up to 32 Kbytes of Flash memory and 4 Kbytes of SRAM), and an extensive range of enhanced peripherals and I/Os. All devices offer standard communication interfaces (one I2C, one SPI/ I2S and one USART), one 12-bit ADC, five 16-bit timers, one 32-bit timer and an advanced-control PWM timer.
Description STM32F031x4 STM32F031x6 Figure 1. Block diagram 32:(5 6HULDO :LUH 'HEXJ 2EO )ODVK PHPRU\ LQWHUIDFH 6:&/. 6:',2 DV $) 65$0 FRQWUROOHU 19,& %XV PDWUL[ &257(; 0 &38 I0$; 0+] 9'' )ODVK *3/ 8S WR .% ELW # 9''$ 5& 0+] 3//&/. *3 '0$ FKDQQHOV 325 5HVHW ,QW 6833/< 683(59,6,21 39' # 9''$ # 9'' 3// 5& N+] 1567 9''$ 966$ 9'' 325 3'5 5& 0+] +6, /6, 9'' WR 9 966 # 9'' 65$0 .
STM32F031x4 STM32F031x6 3 Functional overview Functional overview Figure 1 shows the general block diagram of the STM32F031x4/x6 devices. 3.1 ARM®-Cortex®-M0 core The ARM® Cortex®-M0 is a generation of ARM 32-bit RISC processors for embedded systems. It has been developed to provide a low-cost platform that meets the needs of MCU implementation, with a reduced pin count and low-power consumption, while delivering outstanding computational performance and an advanced system response to interrupts.
Functional overview 3.4 STM32F031x4 STM32F031x6 Cyclic redundancy check calculation unit (CRC) The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit data word and a CRC-32 (Ethernet) polynomial. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity.
STM32F031x4 STM32F031x6 Functional overview In Standby mode, it is put in power down mode. In this mode, the regulator output is in high impedance and the kernel circuitry is powered down, inducing zero consumption (but the contents of the registers and SRAM are lost). 3.5.
Functional overview STM32F031x4 STM32F031x6 Figure 2. Clock tree )/,7)&/. , & 6: +6, +6, +6, 0+] +6, 5& , & 6<6&/. , 6 +&/. 3//65& 6: 3//08/ 35(',9 26&B,1 0+] +6( 26& 6<6&/. +6, 3//&/. +6( 3// [ [ [ « « +35( 335( &66 3&/. 26& B287 3&/. $3% SHULSKHUDOV 7,0 [ [ +6( N+] /6( 26& &RUWH[ V\VWHP WLPHU 335( /6( 26& B,1 $+% FRUH PHPRU\ '0$ &RUWH[ )&/.
STM32F031x4 STM32F031x6 3.8 Functional overview Direct memory access controller (DMA) The 5-channel general-purpose DMAs manage memory-to-memory, peripheral-to-memory and memory-to-peripheral transfers. The DMA supports circular buffer management, removing the need for user code intervention when the controller reaches the end of the buffer. Each channel is connected to dedicated hardware DMA requests, with support for software trigger on each channel.
Functional overview STM32F031x4 STM32F031x6 An analog watchdog feature allows very precise monitoring of the converted voltage of one, some or all selected channels. An interrupt is generated when the converted voltage is outside the programmed thresholds. 3.10.1 Temperature sensor The temperature sensor (TS) generates a voltage VSENSE that varies linearly with temperature.
STM32F031x4 STM32F031x6 3.11 Functional overview Timers and watchdogs The STM32F031x4/x6 devices include up to five general-purpose timers and an advanced control timer. Table 5 compares the features of the different timers. Table 5.
Functional overview STM32F031x4 STM32F031x6 TIM2, TIM3 STM32F031x4/x6 devices feature two synchronizable 4-channel general-purpose timers. TIM2 is based on a 32-bit auto-reload up/downcounter and a 16-bit prescaler. TIM3 is based on a 16-bit auto-reload up/downcounter and a 16-bit prescaler. They feature 4 independent channels each for input capture/output compare, PWM or one-pulse mode output. This gives up to 12 input captures/output compares/PWMs on the largest packages.
STM32F031x4 STM32F031x6 3.11.5 Functional overview SysTick timer This timer is dedicated to real-time operating systems, but could also be used as a standard down counter. It features: 3.
Functional overview STM32F031x4 STM32F031x6 Table 6. Comparison of I2C analog and digital filters Aspect Analog filter Digital filter Pulse width of suppressed spikes ≥ 50 ns Programmable length from 1 to 15 I2Cx peripheral clocks Benefits Available in Stop mode Drawbacks Variations depending on temperature, voltage, process –Extra filtering capability vs. standard requirements –Stable length Wakeup from Stop on address match is not available when digital filter is enabled.
STM32F031x4 STM32F031x6 Functional overview Table 8. STM32F031x4/x6 USART implementation USART modes/features(1) USART1 Hardware flow control for modem X Continuous communication using DMA X Multiprocessor communication X Synchronous mode X Smartcard mode X Single-wire half-duplex communication X IrDA SIR ENDEC block X LIN mode X Dual clock domain and wakeup from Stop mode X Receiver timeout interrupt X Modbus communication X Auto baud rate detection X Driver Enable X 1.
Functional overview 3.16 STM32F031x4 STM32F031x6 Serial wire debug port (SW-DP) An ARM SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU. 22/106 Downloaded from Arrow.com.
STM32F031x4 STM32F031x6 4 Pinouts and pin description Pinouts and pin description /4)3 3) 3) 3$ 3$ 3$ 3$ 3$ 3$ 3% 3% 3% 3% 3$ 3$ 3$ 3$ 3$ 3% 3% 3% 3% 3% 966 9'' 9%$7 3& 3& 26& B,1 3& 26& B287 3) 26&B,1 3) 26&B287 1567 966$ 9''$ 3$ 3$ 3$ 7RS YLHZ 9'' 966 3% 3% %227 3% 3%
Pinouts and pin description STM32F031x4 STM32F031x6 Figure 5. UFQFPN32 package pinout 8)4)31 ([SRVHG SDG 3$ 3$ 3$ 3$ 3$ 3$ 3$ 9'' 9'' 3) 26&B,1 3) 26&B287 1567 9''$ 3$ 3$ 3$ 3% %227 3% 3% 3% 3% 3% 3$ 7RS YLHZ 3$ 3$ 3$ 3$ 3$ 3% 3% 3% 966 06Y 9 Figure 6.
STM32F031x4 STM32F031x6 Pinouts and pin description Figure 7. WLCSP25 package pinout 7RS YLHZ $ 3$ 3$ 3% %227 3) % 3$ 3% 3$ 3$ 3) & 3$ 3% 3$ 3$ 1567 ' 9'' 3$ 3$ 3$ 9''$ ( 966 3% 3% 3$ 3$ :/&63 06Y 9 1. The above figure shows the package in top view, changing from bottom view in the previous document versions. Figure 8.
Pinouts and pin description STM32F031x4 STM32F031x6 Table 10. Legend/abbreviations used in the pinout table Name Abbreviation Definition Unless otherwise specified in brackets below the pin name, the pin function during and after reset is the same as the actual pin name Pin name Pin type I/O structure S Supply pin I Input-only pin I/O Input / output pin FT 5 V-tolerant I/O FTf 5 V-tolerant I/O, FM+ capable TTa 3.3 V-tolerant I/O directly connected to ADC TC Standard 3.
STM32F031x4 STM32F031x6 Pinouts and pin description Table 11.
Pinouts and pin description STM32F031x4 STM32F031x6 Table 11.
STM32F031x4 STM32F031x6 Pinouts and pin description Table 11.
Pinouts and pin description STM32F031x4 STM32F031x6 Table 11.
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AF0 EVENTOUT TIM14_CH1 - SPI1_SCK, I2S1_CK SPI1_MISO, I2S1_MCK SPI1_MOSI, I2S1_SD USART1_TX USART1_RX IR_OUT EVENTOUT SPI1_NSS SPI1_SCK SPI1_MISO SPI1_MOSI Pin name PB0 32/106 Downloaded from Arrow.com.
STM32F031x4 STM32F031x6 5 Memory mapping Memory mapping To the difference of STM32F031x6 memory map in Figure 9, the two bottom code memory spaces of STM32F031x4 end at 0x0000 3FFF and 0x0800 3FFF, respectively. Figure 9.
Memory mapping STM32F031x4 STM32F031x6 Table 14. Peripheral register boundary addresses Bus AHB2 AHB1 APB 34/106 Downloaded from Arrow.com.
STM32F031x4 STM32F031x6 Memory mapping Table 14.
Electrical characteristics STM32F031x4 STM32F031x6 6 Electrical characteristics 6.1 Parameter conditions Unless otherwise specified, all voltages are referenced to VSS. 6.1.1 Minimum and maximum values Unless otherwise specified, the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at TA = 25 °C and TA = TAmax (given by the selected temperature range).
STM32F031x4 STM32F031x6 6.1.6 Electrical characteristics Power supply scheme Figure 12. Power supply scheme 9%$7 /6( 57& :DNH XS ORJLF ± 9 3RZHU VZLWFK 9'' 9&25( [ 9'' 5HJXODWRU 287 [ Q) *3,2V ,1 [ ) /HYHO VKLIWHU 9'',2 ,2 ORJLF .HUQHO ORJLF &38 'LJLWDO 0HPRULHV [ 966 9''$ 9''$ Q) ) 95() 95() $'& $QDORJ 5&V 3// « 966$ 06Y 9 Caution: Each power supply pair (VDD/VSS, VDDA/VSSA etc.
Electrical characteristics 6.1.7 STM32F031x4 STM32F031x6 Current consumption measurement Figure 13. Current consumption measurement scheme , ''B9%$7 9%$7 ,'' 9'' ,''$ 9''$ 06 9 38/106 Downloaded from Arrow.com.
STM32F031x4 STM32F031x6 6.2 Electrical characteristics Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 15: Voltage characteristics, Table 16: Current characteristics and Table 17: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 15.
Electrical characteristics STM32F031x4 STM32F031x6 Table 16. Current characteristics Symbol Ratings Max.
STM32F031x4 STM32F031x6 Electrical characteristics 6.3 Operating conditions 6.3.1 General operating conditions Table 18. General operating conditions Symbol Parameter Conditions Min Max fHCLK Internal AHB clock frequency - 0 48 fPCLK Internal APB clock frequency - 0 48 VDD Standard operating voltage - 2.0 3.6 VDD 3.6 2.4 3.6 1.65 3.6 TC and RST I/O –0.3 VDDIOx+0.3 TTa I/O –0.3 VDDA+0.3(1) FT and FTf I/O –0.3 5.5(1) BOOT0 0 5.
Electrical characteristics STM32F031x4 STM32F031x6 Table 19. Operating conditions at power-up / power-down Symbol Parameter VDD rise time rate tVDD - VDD fall time rate VDDA rise time rate tVDDA 6.3.
STM32F031x4 STM32F031x6 Electrical characteristics Table 21. Programmable voltage detector characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit Rising edge 2.66 2.78 2.9 V Falling edge 2.56 2.68 2.8 V Rising edge 2.76 2.88 3 V Falling edge 2.66 2.78 2.9 V VPVD6 PVD threshold 6 VPVD7 PVD threshold 7 VPVDhyst(1) PVD hysteresis - - 100 - mV PVD current consumption - - 0.15 0.26(1) µA IDD(PVD) 1. Guaranteed by design, not tested in production.
Electrical characteristics STM32F031x4 STM32F031x6 Typical and maximum current consumption The MCU is placed under the following conditions: • All I/O pins are in analog input mode • All peripherals are disabled except when explicitly mentioned • • The Flash memory access time is adjusted to the fHCLK frequency: – 0 wait state and Prefetch OFF from 0 to 24 MHz – 1 wait state and Prefetch ON above 24 MHz When the peripherals are enabled fPCLK = fHCLK The parameters given in Table 23Table 23 to T
STM32F031x4 STM32F031x6 Electrical characteristics Table 23. Typical and maximum current consumption from VDD at 3.6 V (continued) All peripherals enabled Symbol Parameter Conditions fHCLK Max @ TA(1) Typ 25 °C HSE bypass, PLL on IDD Supply current in Sleep mode HSE bypass, PLL off HSI clock, PLL on HSI clock, PLL off All peripherals disabled Max @ TA(1) Typ 85 °C 105 °C 48 MHz 10.7 11.7(2) 11.9 12.5(2) 32 MHz 7.1 7.8 8.1 24 MHz 5.5 6.3 8 MHz 1.
Electrical characteristics STM32F031x4 STM32F031x6 Table 25. Typical and maximum current consumption in Stop and Standby modes Parameter IDD Supply current in Standby mode Supply current in Stop mode IDDA Supply current in Standby mode Supply current in Stop mode Supply current in Standby mode 2.0 V 2.4 V 2.7 V 3.0 V 3.3 V 3.6 V TA = TA = TA = 25 °C 85 °C 105 °C Regulator in run mode, all oscillators OFF 15 15.1 15.3 15.5 15.
STM32F031x4 STM32F031x6 Electrical characteristics Table 26. Typical and maximum current consumption from the VBAT supply Max(1) Typ @ VBAT 2.4 V 2.7 V 3.3 V 3.6 V RTC domain IDD_VBAT supply current Conditions 1.8 V Parameter 1.65 V Symbol TA = 25 °C LSE & RTC ON; “Xtal mode”: lower driving capability; LSEDRV[1:0] = '00' 0.5 0.5 0.6 0.7 0.8 0.9 1.0 LSE & RTC ON; “Xtal mode” higher driving capability; LSEDRV[1:0] = '11' 0.8 TA = TA = 85 °C 105 °C 1.3 Unit 1.7 µA 0.8 0.9 1.0 1.
Electrical characteristics STM32F031x4 STM32F031x6 Table 27. Typical current consumption, code executing from Flash memory, running from HSE 8 MHz crystal Typical run mode Symbol IDD IDDA Parameter Current from VDD supply Current from VDDA supply fHCLK Typical Sleep mode unit Peripheral Peripheral Peripheral Peripheral s enabled s enabled s disabled s disabled 48MHz 20.2 12.3 11.1 2.9 36 MHz 15.3 9.5 8.4 2.4 32 MHz 13.6 8.6 7.5 2.2 24 MHz 10.5 6.7 5.9 1.8 16 MHz 7.2 4.7 4.
STM32F031x4 STM32F031x6 Electrical characteristics trigger circuits used to discriminate the input value. Unless this specific configuration is required by the application, this supply current consumption can be avoided by configuring these I/Os in analog mode. This is notably the case of ADC input pins which should be configured as analog inputs. Caution: Any floating input pin can also settle to an intermediate voltage level or switch inadvertently, as a result of external electromagnetic noise.
Electrical characteristics STM32F031x4 STM32F031x6 Table 28. Switching output I/O current consumption Symbol Parameter Conditions(1) VDDIOx = 3.3 V C =CINT VDDIOx = 3.3 V CEXT = 0 pF C = CINT + CEXT+ CS VDDIOx = 3.3 V CEXT = 10 pF C = CINT + CEXT+ CS ISW I/O current consumption VDDIOx = 3.3 V CEXT = 22 pF C = CINT + CEXT+ CS VDDIOx = 3.3 V CEXT = 33 pF C = CINT + CEXT+ CS VDDIOx = 3.3 V CEXT = 47 pF C = CINT + CEXT+ CS C = Cint VDDIOx = 2.4 V CEXT = 47 pF C = CINT + CEXT+ CS C = Cint 1.
STM32F031x4 STM32F031x6 Electrical characteristics On-chip peripheral current consumption The current consumption of the on-chip peripherals is given in Table 29.
Electrical characteristics STM32F031x4 STM32F031x6 Table 29. Peripheral current consumption (continued) Peripheral APB-Bridge Typical consumption at 25 °C (2) 2.6 SYSCFG ADC APB 1.7 (3) 4.2 TIM1 17.1 SPI1 9.6 USART1 17.4 TIM16 8.2 TIM17 8.0 DBG (MCU Debug Support) 0.5 TIM2 17.4 TIM3 12.8 TIM14 6.0 WWDG 1.5 I2C1 5.1 PWR 1.2 All APB peripherals 1. 52/106 Downloaded from Arrow.com. Unit µA/MHz 110.
STM32F031x4 STM32F031x6 6.3.6 Electrical characteristics Wakeup time from low-power mode The wakeup times given in Table 30 are the latency between the event and the execution of the first user instruction. The device goes in low-power mode after the WFE (Wait For Event) instruction, in the case of a WFI (Wait For Interruption) instruction, 16 CPU cycles must be added to the following timings due to the interrupt latency in the Cortex M0 architecture.
Electrical characteristics STM32F031x4 STM32F031x6 1. Guaranteed by design, not tested in production. Figure 14. High-speed external clock source AC timing diagram WZ +6(+ 9+6(+ 9+6(/ WU +6( WI +6( W WZ +6(/ 7+6( 06 9 Low-speed external user clock generated from an external source In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO. The external clock signal has to respect the I/O characteristics in Section 6.3.14.
STM32F031x4 STM32F031x6 Electrical characteristics High-speed external clock generated from a crystal/ceramic resonator The high-speed external (HSE) clock can be supplied with a 4 to 32 MHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on design simulation results obtained with typical external components specified in Table 33.
Electrical characteristics STM32F031x4 STM32F031x6 Figure 16. Typical application with an 8 MHz crystal 5HVRQDWRU ZLWK LQWHJUDWHG FDSDFLWRUV &/ 26&B,1 0+] UHVRQDWRU &/ 5(;7 I+6( 5) %LDV FRQWUROOHG JDLQ 26&B287 06 9 1. REXT value depends on the crystal characteristics. Low-speed external clock generated from a crystal resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal resonator oscillator.
STM32F031x4 STM32F031x6 Note: Electrical characteristics For information on selecting the crystal, refer to the application note AN2867 “Oscillator design guide for ST microcontrollers” available from the ST website www.st.com. Figure 17. Typical application with a 32.
Electrical characteristics STM32F031x4 STM32F031x6 High-speed internal (HSI) RC oscillator Table 35. HSI oscillator characteristics(1) Symbol Parameter fHSI Conditions Min Typ - - Frequency TRIM HSI user trimming step DuCy(HSI) Duty cycle Accuracy of the HSI oscillator ACCHSI - - - (2) 45 IDDA(HSI) Unit 8 - MHz - (2) - % 1 (2) 55 % TA = -40 to 105°C (3) -2.8 - 3.8 TA = -10 to 85°C -1.9(3) - 2.3(3) TA = 0 to 85°C -1.9(3) - 2(3) TA = 0 to 70°C -1.
STM32F031x4 STM32F031x6 Electrical characteristics High-speed internal 14 MHz (HSI14) RC oscillator (dedicated to ADC) Table 36. HSI14 oscillator characteristics(1) Symbol fHSI14 TRIM Parameter Conditions Min Typ - - 14 Frequency HSI14 user-trimming step DuCy(HSI14) Duty cycle - - - (2) 45 Accuracy of the HSI14 oscillator (factory calibrated) TA = –10 to 85 °C TA = 25 °C tsu(HSI14) IDDA(HSI14) - MHz (2) - % 1 55 (2) % (3) % (3) - 5.1 –3.2(3) - 3.1(3) % –2.5 - 2.
Electrical characteristics STM32F031x4 STM32F031x6 Low-speed internal (LSI) RC oscillator Table 37. LSI oscillator characteristics(1) Symbol Parameter fLSI tsu(LSI) Min Typ Max Unit 30 40 50 kHz LSI oscillator startup time - - 85 µs LSI oscillator power consumption - 0.75 1.2 µA Frequency (2) IDDA(LSI)(2) 1. VDDA = 3.3 V, TA = –40 to 105 °C unless otherwise specified. 2. Guaranteed by design, not tested in production. 6.3.
STM32F031x4 STM32F031x6 Electrical characteristics Table 40. Flash memory endurance and data retention Symbol NEND Parameter Endurance Conditions TA = –40 to +105 °C 1 tRET Data retention kcycle(2) Min(1) Unit 10 kcycle at TA = 85 °C 30 at TA = 105 °C 10 10 kcycle(2) at TA = 55 °C 20 1 kcycle (2) Year 1. Data based on characterization results, not tested in production. 2. Cycling performed over the whole temperature range. 6.3.
Electrical characteristics STM32F031x4 STM32F031x6 Software recommendations The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical Data corruption (for example control registers) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 second.
STM32F031x4 STM32F031x6 Electrical characteristics Table 43. ESD absolute maximum ratings Symbol Ratings Conditions Packages Class Maximum value(1) Unit VESD(HBM) Electrostatic discharge voltage TA = +25 °C, conforming (human body model) to JESD22-A114 All 2 2000 V VESD(CDM) Electrostatic discharge voltage TA = +25 °C, conforming (charge device model) to ANSI/ESD STM5.3.1 All C3 250 V 1. Data based on characterization results, not tested in production.
Electrical characteristics STM32F031x4 STM32F031x6 Table 45. I/O current injection susceptibility Functional susceptibility Symbol Description Unit Negative Positive injection injection IINJ 6.3.
STM32F031x4 STM32F031x6 Electrical characteristics Table 46. I/O static characteristics (continued) Symbol RPU Parameter Weak pull-up equivalent resistor (3) RPD Weak pull-down equivalent resistor(3) CIO I/O pin capacitance Conditions Min Typ Max Unit VIN = VSS 25 40 55 kΩ VIN = - VDDIOx 25 40 55 kΩ - 5 - pF - 1. Data based on design simulation only. Not tested in production. 2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins.
Electrical characteristics STM32F031x4 STM32F031x6 Figure 20.
STM32F031x4 STM32F031x6 Electrical characteristics Output driving current The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink or source up to +/- 20 mA (with a relaxed VOL/VOH). In the user application, the number of I/O pins which can drive current must be limited to respect the absolute maximum rating specified in Section 6.
Electrical characteristics STM32F031x4 STM32F031x6 Input/output AC characteristics The definition and values of input/output AC characteristics are given in Figure 22 and Table 48, respectively. Unless otherwise specified, the parameters given are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Table 18: General operating conditions. Table 48.
STM32F031x4 STM32F031x6 Electrical characteristics Figure 22. I/O AC characteristics definition W I ,2 RXW W U ,2 RXW 7 0D[LPXP IUHTXHQF\ LV DFKLHYHG LI W W U I 7 DQG LI WKH GXW\ F\FOH LV ZKHQ ORDGHG E\ & - VHH WKH WDEOH , 2 $& FKDUDFWHULVWLFV GHILQLWLRQ 06 9 6.3.15 NRST pin characteristics The NRST pin input driver uses the CMOS technology. It is connected to a permanent pullup resistor, RPU.
Electrical characteristics STM32F031x4 STM32F031x6 Figure 23. Recommended NRST pin protection ([WHUQDO UHVHW FLUFXLW 9'' 538 1567 ,QWHUQDO UHVHW )LOWHU ) 06 9 1. The external capacitor protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 49: NRST pin characteristics. Otherwise the reset will not be taken into account by the device. 6.3.
STM32F031x4 STM32F031x6 Electrical characteristics Table 50. ADC characteristics (continued) Symbol Parameter WLATENCY(2)(4) tlatr (2) ADC_DR register ready latency Conditions Min Typ Max Unit ADC clock = HSI14 1.5 ADC cycles + 2 fPCLK cycles - 1.5 ADC cycles + 3 fPCLK cycles - ADC clock = PCLK/2 - 4.5 - fPCLK cycle ADC clock = PCLK/4 - 8.5 - fPCLK cycle fADC = fPCLK/2 = 14 MHz 0.196 µs fADC = fPCLK/2 5.5 1/fPCLK 0.219 µs 10.
Electrical characteristics STM32F031x4 STM32F031x6 Table 51. RAIN max for fADC = 14 MHz (continued) Ts (cycles) tS (µs) RAIN max (kΩ)(1) 28.5 2.04 25.2 41.5 2.96 37.2 55.5 3.96 50 71.5 5.11 NA 239.5 17.1 NA 1. Guaranteed by design, not tested in production. Table 52. ADC accuracy(1)(2)(3) Symbol Parameter Test conditions Typ Max(4) ±1.3 ±2 ±1 ±1.5 ±0.5 ±1.5 ±0.
STM32F031x4 STM32F031x6 Electrical characteristics Figure 24.
Electrical characteristics 6.3.17 STM32F031x4 STM32F031x6 Temperature sensor characteristics Table 53. TS characteristics Symbol Parameter TL(1) Avg_Slope Min Typ Max Unit - ±1 ±2 °C 4.0 4.3 4.6 mV/°C 1.34 1.43 1.52 V VSENSE linearity with temperature (1) V30 Average slope (2) Voltage at 30 °C (± 5 °C) tSTART(1) ADC_IN16 buffer startup time - - 10 µs tS_temp(1) ADC sampling time when reading the temperature 4 - - µs 1. Guaranteed by design, not tested in production. 2.
STM32F031x4 STM32F031x6 Electrical characteristics Table 56. IWDG min/max timeout period at 40 kHz (LSI)(1) Prescaler divider PR[2:0] bits Min timeout RL[11:0]= 0x000 Max timeout RL[11:0]= 0xFFF /4 0 0.1 409.6 /8 1 0.2 819.2 /16 2 0.4 1638.4 /32 3 0.8 3276.8 /64 4 1.6 6553.6 /128 5 3.2 13107.2 /256 6 or 7 6.4 26214.4 Unit ms 1. These timings are given for a 40 kHz clock but the microcontroller internal RC frequency can vary from 30 to 60 kHz.
Electrical characteristics STM32F031x4 STM32F031x6 Table 58. I2C analog filter characteristics(1) Symbol tAF Parameter Maximum width of spikes that are suppressed by the analog filter Min Max Unit 50(2) 260(3) ns 1. Guaranteed by design, not tested in production. 2. Spikes with widths below tAF(min) are filtered. 3.
STM32F031x4 STM32F031x6 Electrical characteristics Figure 26. SPI timing diagram - slave mode and CPHA = 0 166 LQSXW WF 6&. 6&. LQSXW WVX 166 WK 166 WZ 6&.+ WU 6&. &3+$ &32/ &3+$ &32/ WD 62 WZ 6&./ 0,62 RXWSXW WY 62 WK 62 )LUVW ELW 287 WI 6&. 1H[W ELWV 287 WGLV 62 /DVW ELW 287 WK 6, WVX 6, 026, LQSXW )LUVW ELW ,1 1H[W ELWV ,1 /DVW ELW ,1 06Y 9 Figure 27. SPI timing diagram - slave mode and CPHA = 1 166 LQSXW 6&. LQSXW WF 6&. WVX 166 WZ 6&.+ WD 62 WZ 6&./ WI 6&.
Electrical characteristics STM32F031x4 STM32F031x6 Figure 28. SPI timing diagram - master mode +LJK 166 LQSXW 6&. 2XWSXW &3+$ &32/ 6&. 2XWSXW WF 6&. &3+$ &32/ &3+$ &32/ &3+$ &32/ WZ 6&.+ WZ 6&./ WVX 0, 0,62 ,13 87 WU 6&. WI 6&. %,7 ,1 06% ,1 /6% ,1 WK 0, 026, 287387 % , 7 287 06% 287 WY 02 /6% 287 WK 02 DL F 1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD. Table 60.
STM32F031x4 STM32F031x6 Electrical characteristics Table 60. I2S characteristics(1) (continued) Symbol tsu(SD_MR) tsu(SD_SR) th(SD_MR) th(SD_SR) Parameter Data input setup time (2) (2) tv(SD_MT)(2) tv(SD_ST)(2) th(SD_MT) th(SD_ST) Data input hold time Data output valid time Data output hold time Conditions Min Max Master receiver 6 - Slave receiver 2 - Master receiver 4 - Slave receiver 0.
Electrical characteristics STM32F031x4 STM32F031x6 Figure 30. I2S master timing diagram (Philips protocol) WI &. WU &. &. RXWSXW WF &. &32/ WZ &.+ &32/ WY :6 WK :6 WZ &./ :6 RXWSXW WY 6'B07 6'WUDQVPLW /6% WUDQVPLW 06% WUDQVPLW /6% UHFHLYH /6% WUDQVPLW WK 6'B05 WVX 6'B05 6'UHFHLYH %LWQ WUDQVPLW WK 6'B07 06% UHFHLYH %LWQ UHFHLYH /6% UHFHLYH 06Y 9 1. Data based on characterization results, not tested in production. 2.
STM32F031x4 STM32F031x6 7 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 7.1 LQFP48 package information LQFP48 is a 48-pin, 7 x 7 mm low-profile quad flat package. Figure 31. LQFP48 package outline C ! ! ! 3%!4).' 0,!.
Package information STM32F031x4 STM32F031x6 Table 61. LQFP48 package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.170 0.220 0.270 0.0067 0.0087 0.0106 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.500 - - 0.2165 - E 8.800 9.000 9.200 0.
STM32F031x4 STM32F031x6 Package information Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 33. LQFP48 package marking example WƌŽĚƵĐƚ ;ϭͿ ŝĚĞŶƚŝĨŝĐĂƚŝŽŶ 670 ) & 7 ĂƚĞ ĐŽĚĞ ^ƚĂŶĚĂƌĚ ^d ůŽŐŽ < :: ZĞǀŝƐŝŽŶ ĐŽĚĞ WŝŶ ϭ ŝĚĞŶƚŝĨŝĞƌ D^ϯϴϯϵϰsϭ 1.
Package information 7.2 STM32F031x4 STM32F031x6 LQFP32 package information LQFP32 is a 32-pin, 7 x 7 mm low-profile quad flat package. Figure 34. LQFP32 package outline C ! ! ! 3%!4).' 0,!.% # MM CCC '!5'% 0,!.% # + $ , ! $ , $ 0). )$%.4)&)#!4)/. 1. Drawing is not to scale. Downloaded from Arrow.com. % E 84/106 % % B DocID025743 Rev 6 7@.
STM32F031x4 STM32F031x6 Package information Table 62. LQFP32 package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A - - 1.600 - - 0.0630 A1 0.050 - 0.150 0.0020 - 0.0059 A2 1.350 1.400 1.450 0.0531 0.0551 0.0571 b 0.300 0.370 0.450 0.0118 0.0146 0.0177 c 0.090 - 0.200 0.0035 - 0.0079 D 8.800 9.000 9.200 0.3465 0.3543 0.3622 D1 6.800 7.000 7.200 0.2677 0.2756 0.2835 D3 - 5.600 - - 0.2205 - E 8.800 9.000 9.200 0.
Package information STM32F031x4 STM32F031x6 Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 36. LQFP32 package marking example WƌŽĚƵĐƚ ;ϭͿ ŝĚĞŶƚŝĨŝĐĂƚŝŽŶ 670 ) . 7 ĂƚĞ ĐŽĚĞ ^ƚĂŶĚĂƌĚ ^d ůŽŐŽ < :: ZĞǀŝƐŝŽŶ ĐŽĚĞ WŝŶ ϭ ŝĚĞŶƚŝĨŝĞƌ D^ϯϰϵϱϯsϮ 1.
STM32F031x4 STM32F031x6 Package information Figure 37. UFQFPN32 package outline ' $ H $ $ ' GGG & & 6($7,1* 3/$1( E H ( E ( ( / 3,1 ,GHQWLILHU ' / ! " ?-%?6 1. Drawing is not to scale. 2. All leads/pads should also be soldered to the PCB to improve the lead/pad solder joint life. 3. There is an exposed die pad on the underside of the UFQFPN package. This pad is used for the device ground and must be connected. It is referred to as pin 0 in Table: Pin definitions.
Package information STM32F031x4 STM32F031x6 Table 63. UFQFPN32 package mechanical data inches(1) millimeters Symbol Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 0.000 0.020 0.050 0.0000 0.0008 0.0020 A3 - 0.152 - - 0.0060 - b 0.180 0.230 0.280 0.0071 0.0091 0.0110 D 4.900 5.000 5.100 0.1929 0.1969 0.2008 D1 3.400 3.500 3.600 0.1339 0.1378 0.1417 D2 3.400 3.500 3.600 0.1339 0.1378 0.1417 E 4.900 5.000 5.100 0.1929 0.1969 0.
STM32F031x4 STM32F031x6 Package information Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 39. UFQFPN32 package marking example WƌŽĚƵĐƚ ;ϭͿ ŝĚĞŶƚŝĨŝĐĂƚŝŽŶ ) . ĂƚĞ ĐŽĚĞ < :: ZĞǀŝƐŝŽŶ ĐŽĚĞ ^ƚĂŶĚĂƌĚ ^d ůŽŐŽ WŝŶ ϭ ŝĚĞŶƚŝĨŝĞƌ D^ϯϴϯϵϲsϭ 1.
Package information 7.4 STM32F031x4 STM32F031x6 UFQFPN28 package information UFQFPN28 is a 28-lead, 4x4 mm, 0.5 mm pitch, ultra-thin fine-pitch quad flat package. Figure 40. UFQFPN28 package outline 'HWDLO < ' ( ' ' ( 'HWDLO = ! " ?-%?6 1. Drawing is not to scale. Table 64. UFQFPN28 package mechanical data(1) millimeters inches Symbol 90/106 Downloaded from Arrow.com. Min Typ Max Min Typ Max A 0.500 0.550 0.600 0.0197 0.0217 0.0236 A1 - 0.000 0.050 - 0.0000 0.
STM32F031x4 STM32F031x6 Package information 1. Values in inches are converted from mm and rounded to 4 decimal digits. Figure 41. Recommended footprint for UFQFPN28 package $ % B)3B9 1. Dimensions are expressed in millimeters. DocID025743 Rev 6 91/106 102 Downloaded from Arrow.com.
Package information STM32F031x4 STM32F031x6 Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 42. UFQFPN28 package marking example WƌŽĚƵĐƚ ;ϭͿ ŝĚĞŶƚŝĨŝĐĂƚŝŽŶ * ĂƚĞ ĐŽĚĞ Žƚ < ZĞǀŝƐŝŽŶ ĐŽĚĞ :: ;ƉŝŶ ϭ ŝĚĞŶƚŝĨŝĞƌͿ D^ϯϴϯϵϳsϭ 1.
STM32F031x4 STM32F031x6 7.5 Package information WLCSP25 package information WLCSP25 is a 25-ball, 2.423 x 2.325 mm, 0.4 mm pitch wafer level chip scale package. Figure 43. WLCSP25 package outline H EEE = $ EDOO ORFDWLRQ ) H * $ 'HWDLO $ H H ( $ $ $ %XPS VLGH 6LGH YLHZ %XPS $ RULHQWDWLRQ UHIHUHQFH HHH = DDD $ E EDOOV FFF = ; < GGG = [ :DIHU EDFN VLGH = 6HDWLQJ SODQH E 'HWDLO $ URWDWHG :/&63 B$ 1B0(B9 1. Drawing is not to scale. Table 65.
Package information STM32F031x4 STM32F031x6 Table 65. WLCSP25 package mechanical data (continued) inches(1) millimeters Symbol Min Typ Max Min Typ Max aaa - 0.100 - - 0.0039 - bbb - 0.100 - - 0.0039 - ccc - 0.100 - - 0.0039 - ddd - 0.050 - - 0.0020 - eee - 0.050 - - 0.0020 - 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Back side coating. 3. Dimension is measured at the maximum bump diameter parallel to primary datum Z. 4.
STM32F031x4 STM32F031x6 Package information Device marking The following figure gives an example of topside marking orientation versus ball A1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 45. WLCSP25 package marking example 'RW 3URGXFW LGHQWLILFDWLRQ ) 'DWH FRGH <:: 5 5HYLVLRQ FRGH D^ϯϵϬϯϭsϮ 1.
Package information 7.6 STM32F031x4 STM32F031x6 TSSOP20 package information TSSOP20 is a 20-lead thin shrink small-outline, 6.5 x 4.4 mm, 0.65 mm pitch, package. Figure 46.TSSOP20 package outline ϮϬ ϭϭ Đ ϭ ϭ ^ d/E' W> E Ϭ͘Ϯϱ ŵŵ ' h' W> E ϭϬ W/E ϭ / Ed/&/ d/KE Ŭ ĂĂĂ ϭ Ϯ ď > >ϭ Ğ z ͺD ͺsϯ 1. Drawing is not to scale. Table 67. TSSOP20 package mechanical data inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. A - - 1.200 - - 0.0472 A1 0.050 - 0.
STM32F031x4 STM32F031x6 Package information Table 67. TSSOP20 package mechanical data (continued) inches(1) millimeters Symbol Min. Typ. Max. Min. Typ. Max. k 0° - 8° 0° - 8° aaa - - 0.100 - - 0.0039 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 3. Dimension “E1” does not include interlead flash or protrusions.
Package information STM32F031x4 STM32F031x6 Device marking The following figure gives an example of topside marking orientation versus pin 1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 48. TSSOP20 package marking example ^ƚĂŶĚĂƌĚ ^d ůŽŐŽ WƌŽĚƵĐƚ ;ϭͿ ŝĚĞŶƚŝĨŝĐĂƚŝŽŶ ) ) 3 ĂƚĞ ĐŽĚĞ WŝŶ ϭ ŝĚĞŶƚŝĨŝĞƌ < ZĞǀŝƐŝŽŶ ĐŽĚĞ :: D^ϯϴϯϵϱsϭ 1.
STM32F031x4 STM32F031x6 7.7 Package information Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 18: General operating conditions.
Package information 7.7.2 STM32F031x4 STM32F031x6 Selecting the product temperature range When ordering the microcontroller, the temperature range is specified in the ordering information scheme shown in Section 8: Ordering information. Each temperature range suffix corresponds to a specific guaranteed ambient temperature at maximum dissipation and, to a specific maximum junction temperature.
STM32F031x4 STM32F031x6 Package information Assuming the following application conditions: Maximum ambient temperature TAmax = 100 °C (measured according to JESD51-2), IDDmax = 20 mA, VDD = 3.5 V, maximum 20 I/Os used at the same time in output at low level with IOL = 8 mA, VOL= 0.4 V PINTmax = 20 mA × 3.5 V= 70 mW PIOmax = 20 × 8 mA × 0.
Ordering information 8 STM32F031x4 STM32F031x6 Ordering information For a list of available options (memory, package, and so on) or for further information on any aspect of this device, please contact your nearest ST sales office. Table 69.
STM32F031x4 STM32F031x6 9 Revision history Revision history Table 70. Document revision history Date Revision 13-Jan-2014 1 Initial release. 2 Changed the document status to Datasheet - production data. Updated the following: – Table: STM32F031x4/6 family device features and peripheral counts, – Figure: Clock tree, – Figure: Power supply scheme, – Table: Peripheral current consumption.
Revision history STM32F031x4 STM32F031x6 Table 70. Document revision history (continued) Date 28-Aug-2015 16-Dec-2015 104/106 Downloaded from Arrow.com.
STM32F031x4 STM32F031x6 Revision history Table 70. Document revision history (continued) Date 16-Dec-2015 06-Jan-2017 15-May-2017 Revision Changes 4 (continued) – Section 6.3.
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