Datasheet

DS9773 Rev 4 75/93
STM32F030x4/x6/x8/xC Electrical characteristics
75
Figure 27. SPI timing diagram - master mode
1. Measurement points are done at CMOS levels: 0.3 V
DD
and 0.7 V
DD
.
ai14136c
SCK Output
CPHA= 0
MOSI
OUTPUT
MISO
INP UT
CPHA= 0
LSB OUT
LSB IN
CPOL=0
CPOL=1
B I T1 OUT
NSS input
t
c(SCK)
t
w(SCKH)
t
w(SCKL)
t
r(SCK)
t
f(SCK)
t
h(MI)
High
SCK Output
CPHA=1
CPHA=1
CPOL=0
CPOL=1
t
su(MI)
t
v(MO)
t
h(MO)
MSB IN
BIT6 IN
MSB OUT