Datasheet

Functional overview STM32F030x4/x6/x8/xC
16/93 DS9773 Rev 4
Figure 3. Clock tree of STM32F030xC
3.7 General-purpose inputs/outputs (GPIOs)
Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as
input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the
GPIO pins are shared with digital or analog alternate functions.
The I/O configuration can be locked if needed following a specific sequence in order to
avoid spurious writing to the I/Os registers.
MSv47988V1
OSC_IN
OSC_OUT
OSC32_IN
OSC32_OUT
IWDG
MCO
Main clock
output
PLLCLK
HSI
HSE
HCLK
PLLCLK
AHB, core, memory, DMA,
Cortex FCLK free-run clock
LSE
LSI
HSI
HSE
RTC
SW
MCO
RTCCLK
RTCSEL
SYSCLK
TIM1,3,6,7
14,15,16,17
FLITFCLK
Flash memory
programming
interface
HSI14
I2C1
USART1
LSE
HSI
SYSCLK
PCLK
SYSCLK
HSI
PCLK
Cortex
system timer
APB
peripherals
LSI
LSE
PLLNODIV
MCOPRE
LSE
HSE
CSS
Legend
white
clock tree control element
clock line
control line
black
clock tree element
/32
4-32 MHz
HSE OSC
/1,/2,/4,
/8,/16
/1,/2
14 MHz
HSI14 RC
/1,/2,…
…/512
32.768 kHz
LSE OSC
40 kHz
LSI RC
x1, x2
/8
/1,/2,/4,..
../128
USART1SW
PPRE
PPREHPRE
I2C1SW
SYSCLK
HSI
HSI
8 MHz
HSI RC
/2, /4
ADC
(14 MHz max)
CKMODE
PLLMUL
PLLSRC
PREDIV
/1,/2,..
../16
PLL
x2,x3,..
...x16