Datasheet

ST7LITE0xY0, ST7LITESxY0
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2 PIN DESCRIPTION
Figure 2. 20-Pin QFN Package Pinout
Figure 3. 16-Pin SO and DIP Package Pinout
k
2
1
3
4
5
78 910
11
12
13
14
15
17181920
MOSI/AIN3/PB3
MISO/AIN2/PB2
NC
NC
NC
CLKIN/AIN4/PB4
RESET
V
DD
PB0/SS/AIN0
V
SS
PA0 (HS)/LTIC
PA5 (HS)/ICCDATA
PA4 (HS)
NC
PA3 (HS)
PA2 (HS)/ATPWM0
PA7
MCO/ICCCLK/PA6
(HS) 20mA High sink capability
eix associated external interrupt vector
ei1
6
SCK/AIN1/PB1
ei2
16
PA1 (HS)
e0e3
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
SS
V
DD
SS/AIN0/PB0
CLKIN/AIN4/PB4
MOSI/AIN3/PB3
MISO/AIN2/PB2
SCK/AIN1/PB1
RESET
PA0 (HS)/LTIC
PA1 (HS)
PA7
PA6/MCO/ICCCLK
PA5 (HS)/ICCDATA
PA4 (HS)
PA3 (HS)
PA2 (HS)/ATPWM0
ei1
ei0
(HS) 20mA high sink capability
ei
x
associated external interrupt vector
ei2
ei3
1