Datasheet

ST7LITE0xY0, ST7LITESxY0
48/124
11 ON-CHIP PERIPHERALS
11.1 LITE TIMER (LT)
11.1.1 Introduction
The Lite Timer can be used for general-purpose
timing functions. It is based on a free-running 8-bit
upcounter with two software-selectable timebase
periods, an 8-bit input capture register and watch-
dog function.
11.1.2 Main Features
■ Realtime Clock
– 8-bit upcounter
– 1 ms or 2 ms timebase period (@ 8 MHz f
OSC
)
– Maskable timebase interrupt
■ Input Capture
– 8-bit input capture register (LTICR)
– Maskable interrupt with wakeup from Halt
Mode capability
■ Watchdog
– Enabled by hardware or software (configura-
ble by option byte)
– Optional reset on HALT instruction (configura-
ble by option byte)
– Automatically resets the device unless disable
bit is refreshed
– Software reset (Forced Watchdog reset)
– Watchdog reset status flag
Figure 31. Lite Timer Block Diagram
LTCSR
WATCHDOG
8-bit UPCOUNTER
/2
8-bit
f
LTIMER
f
WDG
8
LTIC
f
OSC
/32
WDGDWDGE
WDG
TBF TBIETBICFICIE
WATCHDOG RESET
LTTB INTERRUPT REQUEST
LTIC INTERRUPT REQUEST
LTICR
INPUT CAPTURE
REGISTER
1
0
1 or 2 ms
Timebase
(@ 8 MHz
f
OSC
)
To 12-bit AT TImer
f
LTIMER
RF
07
1