Datasheet

2 Block schematic
Figure 1. Block diagram
RF a nte nn a
B atte ry or Exte rn al Sup ply
Cryst al
32 MH z
clock
SU PPLY F ILTER
Bea d F errite
R F
BA LU N
+ Filt er
C rysta l
32 .7 68 kHz
clock
IN TER NAL 2.4 5 GHz
I/0
Sig nals
(O ption als)
B LU ETOOTH
BL UEN R G-1
32 MH z
in ternal
clock
32 .7 68 kHz
in ternal
clock
I2C BU S LI NE
I
SPI LI NE
U AR T LI NE
ADC ( 2 ch. ma x)
GPI O sign als
FL ASH
ME MOR Y
(16 0 kB )
R AM
MEM OR Y
(24 kB)
SPBTLE-1 S
IN TE RN AL
SM PS
SPBTLE-1S
Block schematic
DS12065 - Rev 5
page 4/25