Datasheet

M93C46, M93C56, M93C66, M93C76, M93C86 Instructions

Doc ID 4997 Rev 12 13/34

Figure 4. READ, WRITE, WEN, WDS sequences

1. For the meanings of An, Xn, Qn and Dn, see Table 5, Table 6 and Table 7.

5.3 Erase Byte or Word

The Erase Byte or Word (ERASE) instruction sets the bits of the addressed memory byte (or

word) to 1. Once the address has been correctly decoded, the falling edge of the Chip

Select Input (S) starts the self-timed Erase cycle. The completion of the cycle can be

detected by monitoring the READY/BUSY

line, as described in Section 6: READY/BUSY

status.

AI00878d

1 1 0 An A0

Qn Q0

DATA OUT

Read

SWrite

ADDR

CODE

1 0An A0

DATA IN

CODE

Dn D01

BUSY READY

SWrite

Enable

1 0XnX0D

CODE

101

SWrite

Disable

1 0XnX0D

CODE

0 00

CHECK

STATUS

ADDR