Datasheet

The system-to-user transfer of clock data will be halted whenever the address being read is a clock address (00h
to 07h). The update will resume due to a stop condition or when the pointer increments to any non-clock address
(08h-0Fh).
Note: This is true both in READ mode and WRITE mode.
An alternate READ mode may also be implemented whereby the master reads the M41T6x slave without first
writing to the (volatile) address pointer. The first address that is read is the last one stored in the pointer (see
Figure 15. Alternative READ mode sequence).
Figure 13. Slave address location
R/W
SLAVE ADDRESSSTART A
0 1 0 0 01 1
MSB
LSB
Figure 14. READ mode sequence
BUS ACTIVITY:
ACK
S
ACK ACK ACK
NO ACK
STOP
START
P
SDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n DATA n+1
DATA n+X
WORD
ADDRESS (An)
SLAVE
ADDRESS
S
START R/W
SLAVE
ADDRESS
ACK
Figure 15. Alternative READ mode sequence
BUS ACTIVITY:
ACK
S
ACK ACK ACK
NO ACK
STOP START
PSDA LINE
BUS ACTIVITY:
MASTER
R/W
DATA n DATA n+1 DATA n+X
SLAVE
ADDRESS
M41T62, M41T64, M41T65
READ mode
DS3840 - Rev 24
page 9/42