Datasheet

M24C64-DF, M24C64-W, M24C64-R, M24C64-F Signal description
Doc ID 16891 Rev 21 9/43
2.5 V
SS
ground
V
SS
is the reference for the V
CC
supply voltage.
2.6 Supply voltage (V
CC
)
2.6.1 Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage
within the specified [V
CC
(min), V
CC
(max)] range must be applied (see Ta bl e 7, Tabl e 8 and
Tabl e 9). In order to secure a stable DC supply voltage, it is recommended to decouple the
V
CC
line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the
V
CC
/V
SS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
W
).
2.6.2 Power-up conditions
The V
CC
voltage has to rise continuously from 0 V up to the minimum V
CC
operating voltage
defined in Table 7 , Tabl e 8 and Table 9 . The rise time must not vary faster than 1 V/µs.
2.6.3 Device reset
In order to prevent inadvertent Write operations during power-up, a power on reset (POR)
circuit is included. At power-up (continuous rise of V
CC
), the device does not respond to any
instruction until V
CC
has reached the power on reset threshold voltage (this threshold is
lower than the minimum V
CC
operating voltage defined in Table 8 and Table 9). Until V
CC
passes over the POR threshold, the device is reset and in Standby Power mode.
In a similar way, during power-down (continuous decay of V
CC
), as soon as V
CC
drops below
the POR threshold voltage, the device is reset and stops responding to any instruction sent
to it.
2.6.4 Power-down conditions
During power-down (continuous decay of V
CC
), the device must be in Standby Power mode
(mode reached after decoding a Stop condition, assuming that there is no internal Write
cycle in progress).