Datasheet

LIS2DH Registers Description

Doc ID 022516 Rev 1 43/49

Interrupt 2 source register. Read only register.

Reading at this address clears INT2_SRC IA bit (and the interrupt signal on INT 2 pin) and

allows the refreshment of data in the INT2_SRC register if the latched option was chosen.

7.25 INT2_THS (36h)

7.26 INT2_DURATION (37h)

D6 - D0 bits set the minimum duration of the Interrupt 2 event to be recognized. Duration

time steps and maximum values depend on the ODR chosen.

Y low. Default value: 0

(0: no interrupt, 1: Y low event has occurred)

X high. Default value: 0

(0: no interrupt, 1: X high event has occurred)

X Low. Default value: 0

(0: no interrupt, 1: X low event has occurred)

Table 62. INT2_SRC description (continued)

Table 63. INT2_THS register

0 THS6 THS5 THS4 THS3 THS2 THS1 THS0

Table 64. INT2_THS description

THS6 - THS0

Interrupt 2 threshold. Default value: 000 0000

1LSb = 16mg @FS=2g;

1LSb = 32mg @FS=4g;

1LSb = 62mg @FS=8g;

1LSb = 186mg @ FS=16g

Table 65. INT2_DURATION register

0 D6D5D4D3D2D1D0

Table 66. INT2_DURATION description

D6-D0

Duration value. Default value: 000 0000

1 LSb = 1/ODR

(1)

1. Duration time is measured in N/ODR, where N is the content of the duration register.