Datasheet

Application hints LIS2DH
20/49 Doc ID 022516 Rev 1
3 Application hints
Figure 5. LIS2DH electrical connection
The device core is supplied through Vdd line while the I/O pads are supplied through
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 µF aluminum) should
be placed as near as possible to the pin 8 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to Figure 5). It is possible to remove Vdd maintaining Vdd_IO
without blocking the communication bus, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I
2
C or SPI interfaces.When using the I
2
C, CS must be tied high.
The functions, the threshold and the timing of the two interrupt pins (INT1 and INT2) can be
completely programmed by the user through the I
2
C/SPI interface.
3.1 Soldering information
The LGA package is compliant with the ECOPACK
®
, RoHS and “Green” standard.
It is qualified for soldering heat resistance according to JEDEC J-STD-020.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendations are available at www.st.com
.
Vdd_IO
Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO
Vdd_IO
SCL/SPC
SDA/SDI/SDO
CS
SDO/SA0
GND
INT1
INT2
Vdd
Pin 1 indicator
4
1
5
7
11
8
GND
GND
1214
10µF
Vdd
100nF
GND
GND
AM10220V1