Datasheet

Figure 21. High input voltage circuit (configuration 2)
GAMG220920161019MT
Figure 22. High input and output voltage
V
O
= V
XX
+ V
Z1
GAMG220920161020MT
Figure 23. Reducing power dissipation with dropping resistor
V -V -V
R = __
I(mi
___
n)
____
XX
___
DRO
____
P(max)
____
I
O(max)
+I
d(max)
GAMG220920161021MT
L78
Design consideration
DS0422 - Rev 36
page 27/55