Datasheet

DocID15308 Rev 8 7/37
L6599A Pin connection
37
11 LVG
Low-side gate-drive output. The driver is capable of 0.3 A min. source and 0.8 A
min. sink peak current to drive the lower MOSFET of the half bridge leg. The pin
is actively pulled to GND during UVLO.
12 Vcc
Supply voltage of both the signal part of the IC and the low-side gate driver.
Sometimes a small bypass capacitor (0.1 µF typ.) to GND may be useful to get a
clean bias voltage for the signal part of the IC.
13 N.C.
High-voltage spacer. The pin is not internally connected to isolate the high-
voltage pin and ease compliance with safety regulations (creepage distance) on
the PCB.
14 OUT
High-side gate-drive floating ground. Current return for the high-side gate-drive
current. Layout carefully the connection of this pin to avoid too large spikes
below ground.
15 HVG
High-side floating gate-drive output. The driver is capable of 0.3 A min. source
and 0.8 A min. sink peak current to drive the upper MOSFET of the half bridge
leg. A resistor internally connected to pin 14 (OUT) ensures that the pin is not
floating during UVLO.
16 VBOOT
High-side gate-drive floating supply voltage. The bootstrap capacitor connected
between this pin and pin 14 (OUT) is fed by an internal synchronous bootstrap
diode driven in-phase with the low-side gate drive. This patented structure
replaces the normally used external diode.
Table 2. Pin description (continued)
Pin no. Type Function