Datasheet

Pin connection L6472
18/70 DocID022729 Rev 5
31 24 FLAG Open drain output
Status flag pin. An internal open drain transistor can
pull the pin to GND when a programmed alarm
condition occurs (step loss, OCD, thermal pre-
warning or shutdown, UVLO, wrong command, non-
performable command).
6 3 STBY\RST
Logic input
Standby and reset pin. LOW logic level resets the
logic and puts the device into standby mode. If not
used, it should be connected to VDD
32 25 STCK Logic input Step-clock input
EPAD Exposed pad Ground
Internally connected to PGND, AGND and DGND
pins
Table 6. Pin description (continued)
Number
Name Type Function
POWERSO HTSSOP