Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Block diagram
- 2 Electrical data
- 3 Electrical characteristics
- 4 Pin connection
- 5 Typical applications
- 6 Functional description
- 6.1 Device power-up
- 6.2 Logic I/O
- 6.3 Charge pump
- 6.4 Microstepping
- 6.5 Absolute position counter
- 6.6 Programmable speed profiles
- 6.7 Motor control commands
- 6.8 Internal oscillator and oscillator driver
- 6.9 Overcurrent detection
- 6.10 Undervoltage lockout (UVLO)
- 6.11 Thermal warning and thermal shutdown
- 6.12 Reset and standby
- 6.13 External switch (SW pin)
- 6.14 Programmable DMOS slew rate, deadtime and blanking time
- 6.15 Integrated analog-to-digital converter
- 6.16 Internal voltage regulator
- 6.17 BUSY\SYNC pin
- 6.18 FLAG pin
- 7 Phase current control
- 8 Serial interface
- 9 Programming manual
- 9.1 Registers and flags description
- Table 9. Register map
- 9.1.1 ABS_POS
- 9.1.2 EL_POS
- 9.1.3 MARK
- 9.1.4 SPEED
- 9.1.5 ACC
- 9.1.6 DEC
- 9.1.7 MAX_SPEED
- 9.1.8 MIN_SPEED
- 9.1.9 FS_SPD
- 9.1.10 KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC
- 9.1.11 INT_SPEED
- 9.1.12 ST_SLP
- 9.1.13 FN_SLP_ACC
- 9.1.14 FN_SLP_DEC
- 9.1.15 K_THERM
- 9.1.16 ADC_OUT
- 9.1.17 OCD_TH
- 9.1.18 STALL_TH
- 9.1.19 STEP_MODE
- 9.1.20 ALARM_EN
- 9.1.21 CONFIG
- Table 22. CONFIG register
- Table 23. Oscillator management
- Table 24. External switch hard stop interrupt mode
- Table 25. Overcurrent event
- Table 26. Programmable power bridge output slew rate values
- Table 27. Motor supply voltage compensation enable
- Table 28. PWM frequency: integer division factor
- Table 29. PWM frequency: multiplication factor
- Table 30. Available PWM frequencies [kHz]: 8-MHz oscillator frequency
- Table 31. Available PWM frequencies [kHz]: 16-MHz oscillator frequency
- Table 32. Available PWM frequencies [kHz]: 24-MHz oscillator frequency
- Table 33. Available PWM frequencies [kHz]: 32-MHz oscillator frequency
- 9.1.22 STATUS
- 9.2 Application commands
- Table 37. Application commands
- 9.2.1 Command management
- 9.2.2 Nop
- 9.2.3 SetParam (PARAM, VALUE)
- 9.2.4 GetParam (PARAM)
- 9.2.5 Run (DIR, SPD)
- 9.2.6 StepClock (DIR)
- 9.2.7 Move (DIR, N_STEP)
- 9.2.8 GoTo (ABS_POS)
- 9.2.9 GoTo_DIR (DIR, ABS_POS)
- 9.2.10 GoUntil (ACT, DIR, SPD)
- 9.2.11 ReleaseSW (ACT, DIR)
- 9.2.12 GoHome
- 9.2.13 GoMark
- 9.2.14 ResetPos
- 9.2.15 ResetDevice
- 9.2.16 SoftStop
- 9.2.17 HardStop
- 9.2.18 SoftHiZ
- 9.2.19 HardHiZ
- 9.2.20 GetStatus
- 9.1 Registers and flags description
- 10 Package information
- 11 Revision history
Programming manual L6470
58/73 DocID16737 Rev 7
9.2.1 Command management
The host microcontroller can control motor motion and configure the L6470 device through
a complete set of commands.
All commands are composed by a single byte. After the command byte, some bytes of
arguments should be needed (see Figure 19). Argument length can vary from 1 to 3 bytes.
Figure 19. Command with 3-byte argument
By default, the device returns an all zero response for any received byte, the only
exceptions are the GetParam and GetStatus commands. When one of these commands is
received, the following response bytes represent the related register value (see Figure 20).
Response length can vary from 1 to 3 bytes.
Figure 20. Command with 3-byte response
During response transmission, new commands can be sent. If a command requiring
a response is sent before the previous response is completed, the response transmission is
aborted and the new response is loaded into the output communication buffer (see
Figure 21).
Figure 21. Command response aborted
When a byte that does not correspond to a command is sent to the IC, it is ignored and the
WRONG_CMD flag in the STATUS register is raised (see Section 9.1.22).
9.2.2 Nop
Nothing is performed.
6',
6'2
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$UJXPHQWE\WH
06%
$UJXPHQWE\WH
/6%
$UJXPHQWE\WH
[ [ [ [
IURPKRVW
WRKRVW
6',
6'2
&RPPDQGE\WH
5HVSRQVHE\WH
06%
5HVSRQVHE\WH
/6%
5HVSRQVHE\WH[
123 123 123
IURPKRVW
WRKRVW
6',
6'2
&RPPDQG
E\WHUHVSH[SHFWHG
&RPPDQG
E\WHUHVSH[SHFWHG
5HVSRQVHE\WH
06%
5HVSRQVHE\WH
06%
5HVSRQVHE\WH[
&RPPDQG
QRUHVSH[SHFWHG
5HVSRQVHE\WH
/6%
IURPKRVW
WRKRVW
&RPPDQG
QRUHVSH[SHFWHG
&RPPDQG
QRUHVSH[SHFWHG
&RPPDQGUHVSRQVH
LVDERUWHG
Table 38. Nop command structure
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
00000000 From host