Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Block diagram
- 2 Electrical data
- 3 Electrical characteristics
- 4 Pin connection
- 5 Typical applications
- 6 Functional description
- 6.1 Device power-up
- 6.2 Logic I/O
- 6.3 Charge pump
- 6.4 Microstepping
- 6.5 Absolute position counter
- 6.6 Programmable speed profiles
- 6.7 Motor control commands
- 6.8 Internal oscillator and oscillator driver
- 6.9 Overcurrent detection
- 6.10 Undervoltage lockout (UVLO)
- 6.11 Thermal warning and thermal shutdown
- 6.12 Reset and standby
- 6.13 External switch (SW pin)
- 6.14 Programmable DMOS slew rate, deadtime and blanking time
- 6.15 Integrated analog-to-digital converter
- 6.16 Internal voltage regulator
- 6.17 BUSY\SYNC pin
- 6.18 FLAG pin
- 7 Phase current control
- 8 Serial interface
- 9 Programming manual
- 9.1 Registers and flags description
- Table 9. Register map
- 9.1.1 ABS_POS
- 9.1.2 EL_POS
- 9.1.3 MARK
- 9.1.4 SPEED
- 9.1.5 ACC
- 9.1.6 DEC
- 9.1.7 MAX_SPEED
- 9.1.8 MIN_SPEED
- 9.1.9 FS_SPD
- 9.1.10 KVAL_HOLD, KVAL_RUN, KVAL_ACC and KVAL_DEC
- 9.1.11 INT_SPEED
- 9.1.12 ST_SLP
- 9.1.13 FN_SLP_ACC
- 9.1.14 FN_SLP_DEC
- 9.1.15 K_THERM
- 9.1.16 ADC_OUT
- 9.1.17 OCD_TH
- 9.1.18 STALL_TH
- 9.1.19 STEP_MODE
- 9.1.20 ALARM_EN
- 9.1.21 CONFIG
- Table 22. CONFIG register
- Table 23. Oscillator management
- Table 24. External switch hard stop interrupt mode
- Table 25. Overcurrent event
- Table 26. Programmable power bridge output slew rate values
- Table 27. Motor supply voltage compensation enable
- Table 28. PWM frequency: integer division factor
- Table 29. PWM frequency: multiplication factor
- Table 30. Available PWM frequencies [kHz]: 8-MHz oscillator frequency
- Table 31. Available PWM frequencies [kHz]: 16-MHz oscillator frequency
- Table 32. Available PWM frequencies [kHz]: 24-MHz oscillator frequency
- Table 33. Available PWM frequencies [kHz]: 32-MHz oscillator frequency
- 9.1.22 STATUS
- 9.2 Application commands
- Table 37. Application commands
- 9.2.1 Command management
- 9.2.2 Nop
- 9.2.3 SetParam (PARAM, VALUE)
- 9.2.4 GetParam (PARAM)
- 9.2.5 Run (DIR, SPD)
- 9.2.6 StepClock (DIR)
- 9.2.7 Move (DIR, N_STEP)
- 9.2.8 GoTo (ABS_POS)
- 9.2.9 GoTo_DIR (DIR, ABS_POS)
- 9.2.10 GoUntil (ACT, DIR, SPD)
- 9.2.11 ReleaseSW (ACT, DIR)
- 9.2.12 GoHome
- 9.2.13 GoMark
- 9.2.14 ResetPos
- 9.2.15 ResetDevice
- 9.2.16 SoftStop
- 9.2.17 HardStop
- 9.2.18 SoftHiZ
- 9.2.19 HardHiZ
- 9.2.20 GetStatus
- 9.1 Registers and flags description
- 10 Package information
- 11 Revision history
DocID16737 Rev 7 33/73
L6470 Functional description
73
6.17.1 BUSY operation mode
The pin works as busy signal when the SYNC_EN bit is set low (default condition). In this
mode the output is forced low while a constant speed, absolute positioning or motion
command is under execution. The BUSY
pin is released when the command has been
executed (target speed or target position reached). The STATUS register includes a BUSY
flag that is the BUSY pin mirror (see Section 9.1.22 on page 55).
In the case of daisy chain configuration, BUSY pins of different ICs can be hard-wired to
save host controller GPIOs.
6.17.2 SYNC operation mode
The pin works as synchronization signal when the SYNC_EN bit is set high. In this mode
a step-clock signal is provided on the output according to a SYNC_SEL and STEP_SEL
parameter combination (see Section 9.1.19 on page 47).
6.18 FLAG pin
By default, an internal open drain transistor pulls the FLAG pin to ground when at least one
of the following conditions occurs:
Power-up or standby/reset exit
Stall detection on A bridge
Stall detection on B bridge
Overcurrent detection
Thermal warning
Thermal shutdown
UVLO
Switch turn-on event
Wrong command
Non-performable command.
It is possible to mask one or more alarm conditions by programming the ALARM_EN
register (see Section 9.1.20 on page 49, Table 21 on page 49). If the corresponding bit of
the ALARM_EN register is low, the alarm condition is masked and it does not cause a FLAG
pin transition; all other actions imposed by alarm conditions are performed anyway. In the
case of daisy chain configuration, FLAG
pins of different ICs can be or-wired to save host
controller GPIOs.