Datasheet

DocID13862 Rev 2 7/15
L6384E Electrical characteristics
15
4.3 Timing diagram
Figure 3. Input/output timing diagram
Symbol Pin Parameter Test condition Min. Typ. Max. Unit
Logic inputs
V
il
1, 3
Low level logic threshold voltage 1.5 V
V
ih
High level logic threshold voltage 3.6 V
I
ih
High level logic input current V
IN
= 15 V 50 70 A
I
il
Low level logic input current V
IN
= 0 V 1 A
I
ref
3 Deadtime setting current 28 A
dt 3 vs. 5, 7 Deadtime setting range
(2)
R
dt
= 47 k
R
dt
= 146 k
R
dt
= 270 k
0.4 0.5
1.5
2.7 3.1
s
s
s
V
dt
3 Shutdown threshold 0.5 V
1. R
DS(on)
is tested in the following way:
Where I
1
is the pin 8 current when V
CBOOT
= V
CBOOT1
, I
2
when V
CBOOT
= V
CBOOT2
.
2. The pin 3 is a high impedance pin. Therefore dt can be set also forcing a certain voltage V
3
on this pin. The deadtime is the
same obtained with an R
dt
if it is: R
dt
× I
ref
= V
3
.
Table 7. DC operation electrical characteristics (continued)(V
CC
= 14.4 V; T
J
= 25 °C)
R
DSON
V
CC
V
CBOOT1
–V
CC
V
CBOOT2
––
I
1
V
CC
,V
CBOOT1
I
2
V
CC
,V
CBOOT2
–
-------------------------------------------------------------------------------------------------------=
IN
SD
HVG
LVG
D99IN1017