Datasheet

SCHEMATIC DIAGRAM
Symbol Parameter TestConditions Min. Typ. Max. Unit
VOLTAGE REGULATION LOOP
I
d
Quiescent drain Current (pin 3) V
i
= 20 V 4.2 9.2 mA
e
N
Output Noise Voltage Vo = Vref I
o
=10mA
B = 1 MHz 80
µ
V
V
o
Output Voltage Range I
o
= 10 mA 2.85 36 V
∆
V
o
V
o
Voltage Load Regulation
(note 1)
∆
I
o
=2A
∆
I
o
= 1.5 A
0.15
0.1
1
0.9
%
%
∆
V
i
∆ V
o
Line Regulation V
0
=5V
V
i
= 8 to 18 V 48 60 dB
SVR Supply Voltage Rejection
V
0
=5V I
o
= 500 mA
∆V
i
=10V
pp
f = 100 Hz (note 2)
48 60 dB
∆
V
i-o
Droupout Voltage between Pins 1
and 5
I
o
= 1.5 A
∆
V
0
≤
2%
2 2.5 V
V
ref
Reference Voltage (pin 4) V
i
=20V I
o
= 10 mA 2.64 2.77 2.86 V
ELECTRICAL CHARACTERISTICS
(T
amb
=25
°
C, unless otherwise specified)
3/12
L200