Datasheet

BTW67 and BTW69 Series
3/6
Figure 3: Relative variation of thermal
impedance versus pulse duration
Figure 4: Relative variation of gate trigger
current, holding current and latching current
versus junction temperature
Figure 5: Surge peak on-state current versus
number of cycles
Figure 6: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10 ms, and corresponding values of I²t
Figure 7: On-state characteristics (maximum
values)
1E-3 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2
1E-3
1E-2
1E-1
1E+0
K=[Z /R
th th
]
t (s)
p
Z
th(j-c)
Z
th(j-a)
BTW69
-40 -20 0 20 40 60 80 100 120 140
0.0
0.5
1.0
1.5
2.0
2.5
T (°C)
j
I,I,I[T] /
GT H L j
I ,I ,I [T =25°C]
GT H L j
I
GT
I
H
& I
L
1 10 100 1000
0
50
100
150
200
250
300
350
400
450
500
550
600
I (A)
TSM
Number of cycles
Non repetitive
T initial=25°C
j
Repetitive
T =75°C
C
t =10ms
p
One cycle
0.01 0.10 1.00 10.00
100
1000
5000
I (A), I t (A s)
TSM
22
t (ms)
p
I t
2
I
TSM
T initial = 25°C
j
dI/dt limitation
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
1
10
100
600
I (A)
TM
V (V)
TM
T
j
=max
T =25°C
j
V =1.0V
R =8.5m
T max.:
j
t0
d
Ω