Owner's manual

Quantum Series 140 EHC 204 00sc 140 EHC 208 00sc
32
Making Bit Settings for 4X Registers
You can only set 4X register bits using ladder logic. This section describes the layout for the registers and defines
the bits. Ladder logic examples are provided in chapter 4, Programming.
The first 4X register controls channel enabling and multiplexing. The following table shows the bit settings for
this register.
Table 3-4 Bit Settings for First 4X Register
Function 1 2 3 45678910111213141516
Bank/Data Bank 1/ LSW 0 0
Format Select Bank 2/ MSW 0 1
Bank 3/Rate* 1 0
Bank 4/ Status* 1 1
Data Delivery Comprehensive 0
Speed 1
Multiplexing Manual 0
Control Auto-sequence 1
Parameter Preset 0 0 0
Definition Count Limit 0 0 1
(for scale/ Rate Limit 0 1 0
limit word) M factor 0 1 1
K Factor 1 0 0
R factor 1 0 1
Undefined 1 1 0
Undefined 1 1 1
Not Used X
Channel Number Channel 1 0 0 0
(for scale Channel 2 0 0 1
/limit word) Channel 3 0 1 0
Channel 4 0 1 1
Channel 5* 1 0 0
Channel 6* 1 0 1
Channel 7* 1 1 0
Channel 8* 1 1 1
Not Used XX
Scaling** Enabled 0
Disabled 1
Program Do Not Program 0
EEPROM Program 1
Limit Word Disabled 0
Enabled 1
* Applies only to the 8 channel module.
**When this bit is set it will disable K, M, and R scaling. It has no effect on limit words (preset, count limit, and rate
limit).