Data Sheet

NAU7802 24-bit ADC
Nuvoton Confidential - 8 - Revision 1.7
ANALOG INPUT
Full-scale input range
(VINxP – VINxN)
± 0.5/(VREF/PGA)
V
VREF = REFP  REFN
Common mode range with PGA
gain 64, 128
AVSS +
1.5
AVDD –
1.5
V
Common mode range with PGA
bypass enabled
AVSS -
0.1
AVDD +
0.1
V
Differential input impedance
5
GΩ
PGA bypass=off, DC
Bandwidth (-3dB)
2.27
Hz
Data output rate = 10 SPS
18.17
Hz
Data output rate = 80 SPS
PGA
1
128
User-selectable gain range
Input capacitance channel 1
14
pF
Input capacitance channel 2
5
pF
Differential Input leakage current
20
pA
PGA bypass=off
Burnout current sources
2.5
A
SYSTEM PERFORMANCE
Resolution
24
No missing codes
Integral nonlinearity NAU7802
± 0.0015
% of FS
With calibration
Offset error
+/-0.3
ppm of FS
With calibration, 1024 samples
Offset error drift
0.02
ppm of
FS/C
With calibration
Gain error
0.01
%
With calibration
Gain error drift
1
ppm/C
With calibration
Common-mode rejection
96
100
dB
at DC 2.5 V ± 0.5 V
130
dB
f
CM
= 60 Hz, 500 mVpp
ADC data rate = 10 SPS
120
dB
f
CM
= 50 Hz, 500 mVpp
ADC data rate = 10 SPS
Notch rejection
100
dB
f
CM
= 60 Hz, 500 mVpp
ADC data rate = 10 SPS
100
dB
f
CM
= 50 Hz, 500 mVpp
ADC data rate = 10 SPS
Power supply rejection
96
100
dB
at DC 5 V ± 0.25 V, with LDO
VOLTAGE REFERENCE INPUT
VREF = REFP  REFN
1.5
AVDD
AVDD+.
0.1
V
REFN input range
-0.1
VREFP-
1.5
V
REFP input range
VREFN+
1.5
AVDD+
0.1