Data Sheet

NAU7802 24-bit ADC
Nuvoton Confidential - 36 - Revision 1.7
REG0x15-REG0x17: OTP Read Value and REG0x15 ADC Registers Read
 ADC registers and OTP[32:24] are sharing REG0x15 when read back, the REG0x1B[7]
RD_OTP_SEL (default 0) is used as read select
REG0x15
Read
REG0x1B[7]=RD_OTP_SEL=1
Read back OTP[32:24]
REG0x15
Read
REG0x1B[7]=RD_OTP_SEL=0(default)
Read back ADC
Registers(default)
REG0x16
Read
Read back OTP[23:16]
REG0x17
Read
Read back OTP[15:8]
11.11REG0x18: Read Only
11.12REG0x19: Read Only
11.13REG0x1A: Read Only
11.14REG0x1B: PGA Registers
Bit
Name
Description
7
RD_OTP_SEL
Read REG0x15 output select
1: Read REG0x15 will read OTP[31:24]
0: Read REG0x15 will read ADC Registers
6
LDOMODE
1: improved stability and lower DC gain, can
accommodate ESR < 5 ohms (output capacitance)
0: improved accuracy and higher DC gain, with ESR < 1
ohm.
5
PGA output buffer
enable
1:PGA output buffer enable
0:PGA output buffer disable
4
PGA bypass enable
1:PGA bypass enable
0:PGA bypass disable
3
PGAINV
1: invert PGA input phase
0: default
2
Reserved
0: default
1
Reserved
0: default
0
PGACHPDIS
1: Chopper disabled
0: default