Data Sheet

NAU7802 24-bit ADC
Nuvoton Confidential - 26 - Revision 1.7
9.3 Signal path with PGA bypass enabled
Register 0x1B bit 4, “PGA bypass enable” removes the PGA from the signal path in applications where
VINxP or VINxN approach AVDD or AVSS. Because the PGA has a limited common mode input range.
In this range the PGA can be bypassed.
In PGA bypass operation the input signal is full scale at the ADC input when
(VINxP - VINxN) = +/- 0.5 * (REFP - REFN) within the ADC common mode range.