Data Sheet

NAU7802 24-bit ADC

Nuvoton Confidential - 19 - Revision 1.7

8.5.3 Streaming I2C Mode R/W Protocol 2

In addition to CASE1 REG11[7]=1, if REG0x11[6] FRD=1 and REG0x15[7]=1, host can

direct issue a I2C read cycle (No writing register address first needed), after the Ack bit

for the ID and “Read Select”, the following 24 SCK is used for NAU7802 to shift out the

24 bit ADC conversion result without the ACK bit needed. So the total Read ADC

conversion data cycle can be shorten to 33 SCK comparing to 54 SCK plus a repeat start

by using the standard I2C.

ID[6:0] AckRd ADCout[23:16] ADCout[15:8] ADCout[7:0] ID[6:0] AckRd ADCout

1 2 …7 8 9 10 11...16 17 18 19...24 25 26 27...32 33

START START

1 2 …7 8 9 10 11...

When I2C is IDLE and

conversion complete

NAU780X pulls SDA

low until seeing host

pulling SCK low

Non-standard I2C transaction:

using 24 SCK sending out 24

bit ADC data without ACK bit

Next conversion

complete

SDIO

SCLK

STOP

Note: Write NAU7802 register is always allowed by using Standard I2C write NAU7802