Data Sheet

Si4702/03-C19
Rev. 1.1 9
Figure 4. 3-Wire Control Interface Read Timing Parameters
½ Cycle Bus
Turnaround
SCLK
70%
30%
SEN
70%
30%
SDIO
80%
20%
t
HSDIO
t
CDV
t
CDZ
Address In Data Out
A7 A0
A6-A5,
R/W,
A4-A1
D15 D14-D1 D0
t
S
t
S
t
HSEN1
t
HSEN2