Data Sheet

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PWP RHB NT

FEATURES APPLICATIONS

DESCRIPTION

Delay

12−BitGrayscale

PWMControl

DCRegister

GSRegister

DCEEPROM

ConstantCurrent

Driver

LEDOpenDetection

Temperature

ErrorFlag

(TEF)

Max.OUTn

Current

Delay

12−BitGrayscale

PWMControl

DCRegister

GSRegister

DCEEPROM

ConstantCurrent

Driver

LEDOpenDetection

Delay

x15

6−BitDot

12−BitGrayscale

PWMControl

DCRegister

GSRegister

DCEEPROM

ConstantCurrent

Driver

LEDOpenDetection

OUT0

OUT1

OUT15

SOUT

SINSCLK

IREF

XERR

XLAT

GSCLK

BLANK

DCPRG

VPRG

GNDVCC

VPRG

Input

Shift

Input

Shift

VPRG

110

2312

191180

9590

116

VPRG

191

LEDOpen

Detection

(LOD)

9590

6 11

DCPRG

192

01 0

GSCounter

CNT

Status

Information:

LOD,

TED,

DCDATA

192

191

REF

=1.24V

Correction

6−BitDot

Correction

6−BitDot

Correction

Blank

TLC5940

SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007

www.ti.com

16 CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL

• Monocolor, Multicolor, Full-Color LED Displays

• 16 Channels

• LED Signboards

• 12 bit (4096 Steps) Grayscale PWM Control

• Display Backlighting

• Dot Correction

• General, High-Current LED Drive

– 6 bit (64 Steps)

– Storable in Integrated EEPROM

• Drive Capability (Constant-Current Sink)

The TLC5940 is a 16-channel, constant-current sink

– 0 mA to 60 mA (V

< 3.6 V)

LED driver. Each channel has an individually

– 0 mA to 120 mA (V

> 3.6 V)

adjustable 4096-step grayscale PWM brightness

control and a 64-step, constant-current sink (dot

• LED Power Supply Voltage up to 17 V

correction). The dot correction adjusts the brightness

• V

= 3 V to 5.5 V

variations between LED channels and other LED

• Serial Data Interface

drivers. The dot correction data is stored in an

integrated EEPROM. Both grayscale control and dot

• Controlled In-Rush Current

correction are accessible via a serial interface. A

• 30MHz Data Transfer Rate

single external resistor sets the maximum current

• CMOS Level I/O

value of all 16 channels.

• Error Information

The TLC5940 features two error information circuits.

– LOD: LED Open Detection

The LED open detection (LOD) indicates a broken or

disconnected LED at an output terminal. The thermal

– TEF: Thermal Error Flag

error flag (TEF) indicates an overtemperature

condition.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (31 pages)

PAGE 1
TLC5940 PWP www.ti.com RHB NT SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 16 CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL FEATURES APPLICATIONS • 16 Channels • 12 bit (4096 Steps) Grayscale PWM Control • Dot Correction – 6 bit (64 Steps) – Storable in Integrated EEPROM • Drive Capability (Constant-Current Sink) – 0 mA to 60 mA (VCC < 3.6 V) – 0 mA to 120 mA (VCC > 3.6 V) • LED Power Supply Voltage up to 17 V • VCC = 3 V to 5.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT DC CHARACTERISTICS VCC Supply Voltage VO Voltage applied to output (OUT0–OUT15) 3 VIH High-level input voltage VIL Low-level input voltage IOH High-level output current VCC = 5V at SOUT IOL Low-level output current VCC = 5V at SOUT, XERR 5.5 V 17 V 0.8 VCC VCC V GND 0.2 VCC V –1 mA 1 mA OUT0 to OUT15, VCC < 3.6V 60 mA OUT0 to OUT15, VCC > 3.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 ELECTRICAL CHARACTERISTICS VCC = 3 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS VOH High-level output voltage IOH = -1mA, SOUT VOL Low-level output voltage IOL = 1mA, SOUT II Input current MIN TYP Supply current VI = VCC or GND; BLANK, DCPRG, GSCLK, SCLK, SIN, XLAT –1 1 VI = GND; VPRG –1 1 µA 50 4 10 No data transfer, all output OFF, VO = 1V, R(IREF) = 10kΩ 0.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 Table 1. Test Parameter Equations D(%) = D(%) = I OUTn - I OUTavg _ 0 -15 IOUTavg _ 0 -15 IOUTavg - I OUT (IDEAL ) I OUT (IDEAL ) ´ 100 (1) ´ 100 (2) æ 1.24 V ö ÷÷ IOUT (IDEAL ) = 31.5 ´ çç è R IREF ø D(% / V ) = D(% / V ) = (3) (IOUTn at VCC = 5.5 V ) - (I OUTn at VCC = 3.0 V ) 100 ´ (I OUTn at VCC = 3.0 V ) 2.5 (4) (IOUTn at VOUTn = 3.0 V ) - (IOUTn at VOUTn = 1.0 V ) 100 ´ (IOUTn at VOUTn = 1.0 V ) 2 .
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TLC5940 www.ti.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 TERMINAL FUNCTION TERMINAL NAME NO. I/O DESCRIPTION DIP PWP RHB BLANK 23 2 31 I Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF. GS counter is also reset. When BLANK = L, OUTn are controlled by grayscale PWM control. DCPRG 19 26 25 I Switch DC data input. When DCPRG = L, DC is connected to EEPROM. When DCPRG = H, DC is connected to the DC register. DCPRG also controls EEPROM writing, when VPRG = V(PRG).
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 PARAMETER MEASUREMENT INFORMATION PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS Resistor values are equivalent resistances, and they are not tested.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 PARAMETER MEASUREMENT INFORMATION (continued) tr0, tf0, tpd0 tr1, tf1, tpd1, tpd2, tpd3, tpd4, tpd5, td VO = 4V Testpoint SOUT RL = 51W CL = 15pF Testpoint OUTn CL = 15pF IO(LC), DIO(LC0), DIO(LC1), DIO(LC2), DIO(LC3) OUTn DIO(LC4) OUTn VO = 1V VO = 1V to 3V V(IREF) tpd3 VCC Testpoint IREF R (IREG) = 640W 470kΩ XERR Figure 2.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 TYPICAL CHARACTERISTICS REFERENCE RESISTOR vs OUTPUT CURRENT POWER DISSIPATION RATE vs FREE-AIR TEMPERATURE 4k 10 k TLC5940PWP PowerPAD Soldered Power Dissipation Rate - mW Reference Resistor, R(IREF) - W 7.68 kΩ 1.92 kΩ 1k 0.96 kΩ 0.64 kΩ 0.48 kΩ 0.38 kΩ 0.
PAGE 11
TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 TYPICAL CHARACTERISTICS (continued) CONSTANT OUTPUT CURRENT, ΔIOLC vs AMBIENT TEMPERATURE CONSTANT OUTPUT CURRENT, ΔIOLC vs OUTPUT CURRENT 8 8 TA = 25°C, VCC = 5 V 6 6 Δ IOLC - Constant Output Current - % Δ IOLC - Constant Output Current - % IO = 60 mA 4 VCC = 3.3 V 2 0 -2 VCC = 5 V -4 -6 -8 -40 0 20 40 60 80 TA - Ambient Temperature - °C 0 -2 -4 -6 0 100 20 40 60 IO - Output Current - mA 80 Figure 7. Figure 8.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 PRINCIPLES OF OPERATION SERIAL INTERFACE The TLC5940 has a flexible serial interface, which can be connected to microcontrollers or digital signal processors in various ways. Only 3 pins are needed to input data into the device. The rising edge of SCLK signal shifts the data from the SIN pin to the internal register. After all data is clocked in, a high-level pulse of XLAT signal latches the serial data to the internal registers.
PAGE 13
TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 VPRG XLAT SIN(a ) SCLK DCb MSB DCa LSB GSb1 MSB 1 192 1 384 96X2 - SOUT(b ) GSb2 MSB GSa1 LSB 385 GSa2 LSB GSb3 MSB 385 384 1 1 192X2 DCb MSB - SIDb1 SIDb1 MSB MSB-1 GSb1 MSB - SIDa1 LSB SIDb2 SIDb2 MSB MSB-1 GSb2 MSB BLANK 1 GSCLK 1 4096 OUT0 (current) OUT1 (current) OUT15 (current) XERR Figure 13.
PAGE 14
TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 LOD: LED OPEN DETECTION The TLC5940 has an LED-open detector that detects broken or disconnected LEDs. The LED open detector pulls the XERR pin to GND when an open LED is detected. XERR and the corresponding error bit in the Status Information Data is only active under the following open-LED conditions. 1. OUTn is on and the time tpd2 (1 µs typical) has passed. 2. The voltage of OUTn is < 0.
PAGE 15
TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 POWER DISSIPATION CALCULATION The device power dissipation must be below the power dissipation rating of the device package to ensure correct operation.
PAGE 16
TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 Figure 14 shows the dot correction data packet format which consists of 6 bits x 16 channel, total 96 bits. The format is Big-Endian format. This means that the MSB is transmitted first, followed by the MSB-1, etc. The DC 15.5 in Figure 14 stands for the 5th most significant bit for output 15. MSB LSB 95 90 DC 15.5 89 6 DC 15.0 DC 14.5 DC 1.0 DC OUT15 5 0 DC 0.5 DC 0.0 DC OUT0 DC OUT14 − DC OUT2 Figure 14.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 V(PRG) VPRG VCC tsu6 tprog th5 DCPRG XLAT SIN DC MSB SCLK 1 DC LSB 96 - SOUT DC MSB Figure 16. EEPROM Programming Timing Chart DCPRG tpd5 tpd5 OUT0 (Current) OUT15 (Current) Figure 17. DCPRG and OUTn Timing Diagram SETTING GRAYSCALE The TLC5940 can adjust the brightness of each channel OUTn using a PWM control scheme.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 the grayscale register (see Figure 11). New grayscale data immediately becomes valid at the rising edge of the XLAT signal; therefore, new grayscale data should be latched at the end of a grayscale cycle when BLANK is high.The first GS data input cycle after dot correction requires an additional SCLK pulse after the XLAT signal to complete the grayscale update cycle.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 VPRG GS Data Input Mode XLAT 1st GS Data Input Cycle GS1 MSB SIN 2nd GS Data Input Cycle GS1 LSB GS2 MSB > tpd4 + 15 x td + tpd3 tsuLOD 1 SCLK SOUT - 192 - GS2 LSB 193 GS1 MSB SID1 MSB 192 1 SID1 MSB-1 SID1 LSB GS2 MSB (1st GS Data Output Cycle) BLANK GSCLK 4096 1 tpd3 OUT0 (current) td OUT1 (current) 15 x td OUT15 (current) tpd2 XERR tpd3 + 15 x td + tpd2 Figure 20.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 GS PWM Cycle n BLANK t wl1 t wh1 t h4 GSCLK 1 t wl1 t wh3 4096 3 t su4 1 t pd3 nxt d t pd1 + td OUT1 (Current) 2 t pd3 t pd1 OUT0 (Current) GS PWM Cycle n+1 t pd3+ n x t d t pd1 + 15 x td OUT15 (Current) t pd2 XERR Figure 21. Grayscale PWM Cycle Timing Chart SERIAL DATA TRANSFER RATE Figure 22 shows a cascading connection of n TLC5940 devices connected to a controller, building a basic module of an LED display system.
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TLC5940 www.ti.com SLVS515C – DECEMBER 2004 – REVISED OCTOBER 2007 APPLICATION EXAMPLE VCC V(LED) V(LED) V(LED) V(LED) 100 k OUT0 SIN XERR SCLK SCLK VCC 100 nF TLC5940 GSCLK DCPRG DCPRG BLANK BLANK SOUT VPRG OUT15 SIN SOUT XERR VCC SCLK XLAT GSCLK OUT0 SOUT XERR XLAT Controller OUT15 SIN IREF 100 nF XLAT GSCLK TLC5940 DCPRG IREF BLANK IC 0 VPRG IC n W_EEPROM 7 VPRG_D VPRG_OE V(22V) 50 k V(22V) 50 k 50 k 50 k 50 k 50 k VPRG Figure 22.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 18-May-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) TLC5940PWPR HTSSOP PWP 28 2000 330.0 TLC5940RHBR QFN RHB 32 3000 330.0 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 16.4 7.1 10.4 1.6 12.0 16.0 Q1 12.4 5.3 5.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 18-May-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC5940PWPR HTSSOP PWP 28 2000 346.0 346.0 33.0 TLC5940RHBR QFN RHB 32 3000 346.0 346.0 29.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.