Datasheet
Table Of Contents
- General Description
- Key Features
- Applications
- System Diagram
- Contents
- Figures
- Tables
- 1 Terms and Definitions
- 2 References
- 3 Block Diagram
- 4 Pinout
- 5 Electrical Specification
- 6 Power Management
- 7 Core System
- 8 Peripherals
- 9 Applications Schematic
- 10 Package Information
- 11 Ordering Information
- Revision History
DA16200MOD 
Ultra Low Power Wi-Fi Module 
Final 
Datasheet 
Revision 3.1 
03-Feb-2021 
CFR0011-120-00 
7 of 60 
© 2021 Dialog Semiconductor 
Table 6: DC Parameters, 3.3 V IO ...................................................................................................... 16 
Table 7: DC Parameters for RTC block, 3.3 V VBAT .......................................................................... 16 
Table 8: DC Parameters for RTC block, 2.1 V VBAT .......................................................................... 16 
Table 9: DC Parameters for Digital Wake-up, 3.3 V VBAT & 1.8/3.3 V IO ......................................... 16 
Table 10: DC Parameters for Digital Wake-up, 2.1 V VBAT & 1.8 V IO ............................................. 17 
Table 11: WLAN Receiver Characteristics .......................................................................................... 17 
Table 12: WLAN Transmitter Characteristics ...................................................................................... 17 
Table 13: Current Consumption in Active State .................................................................................. 18 
Table 14: Current Consumption in Low Power Operation ................................................................... 18 
Table 15: ESD Performance................................................................................................................ 19 
Table 16: Power on Sequence Timing Requirements ......................................................................... 20 
Table 17: RTC Pin Description ............................................................................................................ 22 
Table 18: Wake-up Sources ................................................................................................................ 23 
Table 19: I/O Power Domain ............................................................................................................... 24 
Table 20: QSPI Master Timing Parameters ........................................................................................ 27 
Table 21: SPI Master Pin Configuration .............................................................................................. 27 
Table 22: SPI Master Timing Parameters ........................................................................................... 28 
Table 23: Control Field of the 8-byte Control Type ............................................................................. 29 
Table 24: Control Field of the 4-byte Control Type ............................................................................. 29 
Table 25: SPI Slave Pin Configuration ................................................................................................ 29 
Table 26: SPI Slave Timing Parameters ............................................................................................. 30 
Table 27: SDIO Slave Pin Configuration ............................................................................................. 31 
Table 28: SDIO Slave Timing Parameters .......................................................................................... 31 
Table 29: I2C Master Pin Configuration .............................................................................................. 32 
Table 30: I2C Master Timing Parameters ........................................................................................... 32 
Table 31: I2C Slave Pin Configuration ................................................................................................ 33 
Table 32: I2C Slave Timing Parameters ............................................................................................. 34 
Table 33: SD/eMMC Master Pin Configuration ................................................................................... 35 
Table 34: SD/eMMC Master Timing Parameters ................................................................................ 36 
Table 35: I2S Pin Configuration .......................................................................................................... 36 
Table 36: I2S Clock Selection Guide ................................................................................................... 38 
Table 37: I2S Transmit Timing Parameters ......................................................................................... 39 
Table 38: I2S Receive Timing Parameters .......................................................................................... 39 
Table 39: DC Specification .................................................................................................................. 40 
Table 40: ADC Pin Configuration ........................................................................................................ 41 
Table 41: Control bits to enable and disable hardware flow control ................................................... 46 
Table 42: UART Interrupt Signals ....................................................................................................... 47 
Table 43: UART Pin Configuration ...................................................................................................... 47 
Table 44: PWM Pin Configuration ....................................................................................................... 48 
Table 45: PWM Timing Diagram Description ...................................................................................... 49 
Table 46: JTAG Timing Parameters .................................................................................................... 49 
Table 47: JTAG Pin Configuration ....................................................................................................... 50 
Table 48: Component for RTC POWER KEY ..................................................................................... 52 
Table 49: Typical Reflow Profile (Lead Free): J-STD-020C ................................................................ 57 
Table 50: Ordering Information (Production) ....................................................................................... 58 










