Datasheet

DA16200MOD
Ultra Low Power Wi-Fi Module
Datasheet
Revision 3.1
03-Feb-2021
CFR0011-120-00
33 of 60
© 2021 Dialog Semiconductor
Parameter
Symbol
Fast Mode
High Speed Mode
Unit
Min
Max
Min
Max
SCL clock frequency
F
SCLK
100
400
100
1000
(Note 2)
kHz
Clock Duty (Note 1)
40
60
40
60
%
Hold time of START
T
HD;STA
0.2
-
0.2
-
μs
Low period of the SCL clock
T
LOW
1.27
-
0.55
-
μs
High period of the SCL clock
T
HIGH
1.23
-
0.45
-
μs
Setup time for START condition
T
SU;STA
1.1
-
0.37
-
μs
Data hold time
T
HD;DAT
3x T
op_clk
(Note 4)
-
3x T
op_clk
(Note 4)
-
μs
Data setup time
T
SU;DAT
-
T
LOW
- T
HD;DAT
-
T
LOW
- T
HD;DAT
μs
Rise time of both SDAand SCL
T
R
(Note 3)
0.02
0.3
0.05
0.05
μs
Setup time for STOP condition
T
SU;STO
0.36
-
0.45
-
μs
Data valid acknowledge time
T
VD;ACK
3x T
op_clk
(Note 4)
-
3x T
op_clk
(Note 4)
-
μs
Buffer free time between
START and STOP condition
T
BUF
0.5
-
0.5
-
μs
Note 1 Clock duty ratio = (T
HIGH
/T
SCLK
) × 100[%], T
SCLK
= 1/ F
SCLK
Note 2 Max. clock = 1.0 MHz (clock period = 1000 ns)
Note 3 T
R
depends on a pull-up resistor value.
Note 4 T
op_clk = (
1 / F
op_clk
) x 10^6 usec
8.5.2 I2C Slave
I2C slave interface supports the control of DA16200MOD by an external host. Pin mux condition is
defined in Table 31. Three ranges of clock speed are supported: standard (100 kHz), fast (400 kHz),
and high (1.0 MHz) speed mode.
Table 31: I2C Slave Pin Configuration
Pin Name
Pin Number
I/O
Function Name
GPIOA1
32
I
I2C_CLK
GPIOA3
30
I
GPIOA5
28
I
GPIOA7
26
I
GPIOA0
33
I/O
I2C_SDA
GPIOA2
31
I/O
GPIOA4
29
I/O
GPIOA6
27
I/O