Datasheet

DA16200MOD
Ultra Low Power Wi-Fi Module
Datasheet
Revision 3.1
03-Feb-2021
CFR0011-120-00
25 of 60
© 2021 Dialog Semiconductor
8 Peripherals
This section describes the peripherals that are supported by the DA16200MOD.
8.1 QSPI: Master with XIP Feature
QSPI master supports 4-line SPI communication with commercial flash memory devices and uses
Motorola SPI-compatible interface among SPI communication modes. The highest communication
speed is the same as the AMBA bus clock, and the speed is adjustable in integer multiples. The
designed QSPI supports 4-/2-/1-line types depending on the purpose. These types should be
combined. Especially when the 1-line communication mode is used, it can be used as the SPI
master.
QSPI master is an IP for communication between the flash memory and AMBA AHB bus and is
designed to support XIP. The features of the QSPI master are summarized as follows:
Serial Flash Interface:
● SPI compatible serial bus interface
○ Configurable SPI I/O modes:
– Single I/O mode
– Dual I/O mode
– Quad I/O mode
○ JEDEC Standard: JESD216B
○ 24-bit and 32-bit addressing
○ Supports to access flash with XIP mode
– Read access without command
– Read access without address and command
○ Programmable SPI clock phase and polarity
○ Maximum number of SPI CS is four that can be operated
AMBA Slave Interface
● Compliance to the AMBA AHB bus specification, Rev 3.0 [6]
● Direct code execution: directly addressable access without additional driver software
● Supports single and incrementing burst transfer (SINGLE, INCR, INCR4, INCR8, INCR16)
● Supports byte, half-word, and word transaction
● AMBA slave interface is optional to access configuration and status registers
● Simple timer is used to check the completion time of flash operation
● XIP path of QSPI master supports HW remapping function to execute selected boot image for
over-the-air programming (OTA)
AMBA Master Interface
● Compliance to the AMBA AHB bus specification, Rev 3.0 [6]
● Supports DMA operation to access serial flash devices
○ Automatic copy of code image from serial flash to system RAM
○ Automatic programming of code image from system RAM to serial flash
● Performs a mem-to-mem copy in units of 32 bits, regardless of the address and length
● Supports single and incrementing burst transfer (SINGLE, INCR, INCR4, INCR8, INCR16)
● Supports byte, half-word, and word transaction
Figure 9 shows the QSPI Master Block Diagram.