Datasheet

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
C4 handbook pg 171:
MSEL[3..0] =
PS-FAST = "1100" @ 3.3/3.0/2.5V
PS-STD = "0000" @3.3/3.0/2.5V
FPP-FAST = "1110" @3.3/3.0/2.5V
FPP-FAST = "1111" @1.8/1.5 V (default)
MSEL[3..0]
MSEL pins should be connected
directly to VCCA or GND.
JTAG is on BANK 1 aka VCCIO_L_C4
Config is on BANK 1 aka VCCIO_L_C4
FPGA CONFIGURATION
TCK
TDI
TDO
TCK
TDO
TMS
TDI
MSEL3 MSEL2 MSEL0
MSEL3
MSEL2
MSEL1
MSEL0
C4_NSTATUS
C4_CONFDONE
TMS
C4_NCONFIG
MSEL1
VCCIO_L_C4
VCCIO_L_C4
VCCIO_L_C4
VCCA_C4 VCCA_C4 VCCA_C4 VCCA_C4
VCCIO_L_C4
VCCIO_L_C4
VCCIO_L_C4 VCCIO_L_C4
C4_NSTATUS
C4_DCLK
C4_NCONFIG
C4_CONFDONE
Title
Size Document Number Rev
Date: Sheet of
<Doc> A
Nuand
B
2 14Saturday, March 30, 2013
Title
Size Document Number Rev
Date: Sheet of
<Doc> A
Nuand
B
2 14Saturday, March 30, 2013
Title
Size Document Number Rev
Date: Sheet of
<Doc> A
Nuand
B
2 14Saturday, March 30, 2013
R253
1K
R253
1K
R254
1K
R254
1K
EP4CE15A115F484
U43C
EP4CE15A115F484
U43C
NCONFIG
K5
NSTATUS
K6
MSEL3
K20
TMS
L1
TCK
L2
NCE
L3
TDO
L4
TDI
L5
MSEL2
L17
MSEL1
L18
MSEL0
M17
CONF_DONE
M18
DCLK
K2
R259
10K
R259
10K
R273
10K
R273
10K
R255
10K
R255
10K
JTAG_ICE_CONN
J38
ALTERA_JTAG
JTAG_ICE_CONN
J38
ALTERA_JTAG
TCK
1
TDO
3
TMS
5
NC2
7
TDI
9
GND
2
VCC_TRGT
4
NC1
6
NC3
8
GND
10
R256
10K
R256
10K
R252
1K
R252
1K