Data Sheet

DocID023111 Rev 3 25/38

H3LIS331DL Register description

7.3 CTRL_REG2 (21h)

Table 19. Power mode and low-power output data rate configurations

PM2 PM1 PM0 Power mode selection

Output data rate [Hz]

ODR

0 0 0 Power-down --

0 0 1 Normal mode ODR

0 1 0 Low power 0.5

0 1 1 Low power 1

1 0 0 Low power 2

1 0 1 Low power 5

1 1 0 Low power 10

Table 20. Normal mode output data rate configurations and low-pass cutoff

frequencies

DR1 DR0

Output data rate [Hz]

ODR

Low-pass filter cutoff

frequency [Hz]

0 0 50 37

0 1 100 74

1 0 400 292

1 1 1000 780

Table 21. CTRL_REG2 register

BOOT HPM1 HPM0 FDS HPen2 HPen1 HPCF1 HPCF0

Table 22. CTRL_REG2 description

BOOT

Reboot memory content. Default value: 0

(0: normal mode; 1: reboot memory content)

HPM1, HPM0

High-pass filter mode selection. Default value: 00

(00: normal mode; Others: refer to Table 23)

FDS

Filtered data selection. Default value: 0

(0: internal filter bypassed; 1: data from internal filter sent to output register)

HPen2

High-pass filter enabled for interrupt 2 source. Default value: 0

(0: filter bypassed; 1: filter enabled)