Data Sheet
Page 64
RFM95/96/97/98(W)
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4.2.11. Digital IO Pins Mapping
Six general purpose IO pins are available on the RFM95/96/97/98(W), and their configuration in Continuous or Packet
mode is controlled through RegDioMapping1 and RegDioMapping2.
Table 74 DIO Mapping, Continuous Mode
DIOx
Mapping
Sleep
Standby
FSRx/Tx
Rx
Tx
00
-
S
y
nc
A
ddress TxRead
y
01
-
Rssi / PreambleDetect
-
10
-
RxReady TxReady
11
-
00
- Dclk
01
-
Rssi / PreambleDetect
-
10
-
11
-
00
- Data
01
-
Data
10
-
Data
11
-
Data
00
-
Timeout
-
01
-
Rssi / PreambleDetect
-
10
-
11
-
TempChange / LowBat TempChange / LowBat
00
-
Tem
p
Chan
g
e /
LowBat
01
-
PllLock
10
-
TimeOut
-
11
-
ModeReady ModeReady
00
ClkOut i
f
RC ClkOut ClkOut
01
-
PllLock
10
-
Rssi / PreambleDetect
-
11
-
ModeReady ModeReady
Table 75 DIO Mapping, Packet Mode
DIOx
Mapping
Sleep
Standby
FSRx/Tx
Rx
Tx
00
-
Pa
y
loadRead
y
PacketSent
01
-
CrcOk
-
10
-
11
-
TempChange / LowBat TempChange / LowBat
00
Fi
f
oLe
v
el Fi
f
oLe
v
el Fi
f
oLe
v
el
01
FifoEmpty FifoEmpty FifoEmpty
10
FifoFull FifoFull FifoFull
11
-
00
Fi
f
oFull Fi
f
oFull Fi
f
oFull
01
-
RxReady
-
10
FifoFull
TimeOut
FifoFull
11
FifoFull
SyncAddress
FifoFull
00
Fi
f
oEm
p
t
y
Fi
f
oEm
p
t
y
Fi
f
oEm
p
t
y
01
-
TxReady
10
FifoEmpty FifoEmpty FifoEmpty
11
FifoEmpty FifoEmpty FifoEmpty
00
-
Tem
p
Chan
g
e
/
LowBat Tem
p
Chan
g
e / LowBat
01
-
PllLock
10
-
TimeOut
-
11
-
Rssi / PreambleDetect
-
00
ClkOut i
f
RC
ClkOut ClkOut
01
-
PllLock
10
-
Data
11
-
ModeReady ModeReady
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIO5
DIO4
DIO3
DIO2
DIO1
DIO0