Data Sheet

Page 62
RFM95/96/97/98(W)
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WIRELESS & SENSING PRELIMINARY DATASHEET
FifoLevel
1
0
B B+1
# of bytes in FIFO
Figure 27. FifoLevel IRQ Source Behavior
Notes - FifoLevel interrupt is updated only after a read or write operation on the FIFO. Thus the interrupt cannot be
dynamically updated by only changing the FifoThreshold parameter
- FifoLevel interrupt is valid as long as FifoFull does not occur. An empty FIFO will restore its normal operation
FIFO Clearing
Table below summarizes the status of the FIFO when switching between different modes
Table 73 Status of FIFO when Switching Between Different Modes of the Chip
From To FIFO status Comments
Stdby Sleep Not cleared
Sleep Stdby Not cleared
Stdby/Sleep Tx Not cleared To allow the user to write the FIFO in Stdby/Sleep before Tx
Stdby/Sleep Rx Cleared
Rx Tx Cleared
Rx Stdby/Sleep Not cleared To allow the user to read FIFO in Stdby/Sleep mode after Rx
Tx Any Cleared
4.2.10.1. Sync Word Recognition
Overview
Sync word recognition (also called Pattern recognition) is activated by setting SyncOn in RegSyncConfig. The bit
synchronizer must also be activated in Continuous mode (automatically done in Packet mode).
The block behaves like a shift register; it continuously compares the incoming data with its internally programmed Sync
word and sets SyncAddressMatch when a match is detected. This is illustrated in Figure 28 below.