Data Sheet

www.nxp.com
LPC1768 features
Date of release: September 2009
Document order number: 9397 750 16802
Printed in the Netherlands
© 2009 NXP B.V.
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ARM Cortex-M3 core • 100MHzoperation
• NestedVectoredInterruptControllerforfastdeterministicinterrupts
• WakeupInterruptControllerallowsautomaticwakefromanypriorityinterrupt
• MemoryProtectionUnit
• Fourreduced-powermodes:sleep,deepsleep,power-downanddeeppower-down
Memories • 512KBofFlashmemory
• 64KBofSRAM
Serial peripherals •10/100EthernetMAC
• USB2.0full-speeddevice/Host/OTGcontrollerwithon-chipPHY
• FourUARTswithfractionalbaudrategeneration,RS-48,modemcontrol,andIrDA
• TwoCAN2.0Bcontrollers
• ThreeSSP/SPIcontrollers
• ThreeI
2
C-bus interfaces with one supporting Fast Mode Plus (1-Mbit/s data rates)
• I
2
S interface for digital audio
Analog peripherals • 12-bitADCwitheightchannels
• 10-bitDAC
Other peripherals • Ultra-low-power(<1uA)RTC
• General-purposeDMAcontrollerwitheightchannels
• Upto70GPIO
• MotorcontrolPWMandQuadratureEncoderInterfacetosupportthree-phasemotors
• Four32-bitgeneral-purposetimers/counters
Package • 100-pinLQFP(14x14x1.4mm)