Datasheet

9.53 INT_OIS (6Fh)
OIS interrupt configuration register and accelerometer self-test enable setting. Primary interface for read-only (r);
only Aux SPI can write to this register (r/w).
Table 144. INT_OIS register
INT2_
DRDY_OIS
LVL2_OIS DEN_LH_OIS - - 0 ST1_XL_OIS ST0_XL_OIS
Table 145. INT_OIS register description
INT2_DRDY_OIS Enables OIS chain DRDY on INT2 pin. This setting has priority over all other INT2 settings.
LVL2_OIS Enables level-sensitive latched mode on the OIS chain. Default value: 0
DEN_LH_OIS
Indicates polarity of DEN signal on OIS chain
(0: DEN pin is active-low;
1: DEN pin is active-high)
ST[1:0]_XL_OIS
Selects accelerometer self-test – effective only if XL OIS chain is enabled. Default value: 00
(00: Normal mode;
01: Positive sign self-test;
10: Negative sign self-test;
11: not allowed)
LSM6DSO
INT_OIS (6Fh)
DS12140 - Rev 2
page 82/172