Datasheet

9.14 CTRL3_C (12h)
Control register 3 (r/w)
Table 49. CTRL3_C register
BOOT BDU H_LACTIVE PP_OD SIM IF_INC 0 SW_RESET
Table 50. CTRL3_C register description
BOOT
Reboots memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
This bit is automatically cleared.
BDU
Block Data Update. Default value: 0
(0: continuous update;
1: output registers are not updated until MSB and LSB have been read)
H_LACTIVE
Interrupt activation level. Default value: 0
(0: interrupt output pins active high; 1: interrupt output pins active low)
PP_OD
Push-pull/open-drain selection on INT1 and INT2 pins. Default value: 0
(0: push-pull mode; 1: open-drain mode)
SIM
SPI Serial Interface Mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
IF_INC
Register address automatically incremented during a multiple byte access with a serial interface (I²C or SPI).
Default value: 1
(0: disabled; 1: enabled)
SW_RESET
Software reset. Default value: 0
(0: normal mode; 1: reset device)
This bit is automatically cleared.
LSM6DSO
CTRL3_C (12h)
DS12140 - Rev 2
page 52/172