Datasheet
Table Of Contents
± 2g / 4g / 8g / 16g Tri-axis Digital
Accelerometer Specifications
PART NUMBER:
KX132-1211
Rev. 1.0
31-Jul-2019
36 Thornwood Dr. – Ithaca, NY 14850 © 2019 Kionix – All Rights Reserved
tel: 607-257-1080 – fax:607-257-1146 893-12874-1907311605-0.2
www.kionix.com - info@kionix.com Page 1 of 31
Product Description
The KX132-1211 is a tri-axis ±2g, ±4g, ±8g, or ±16g silicon micromachined
accelerometer featuring a user-configurable 3-stage Advanced Data Path (ADP)
consisting of a low-pass filter, low-pass/high-pass filter, and RMS calculation
engine. The KX132-1211 accelerometer also features an advanced Wake-Up and
Back-to-Sleep detection with a high-resolution threshold capability configurable
down to 3.9 mg, 512-byte buffer that continues to record data even when being
read, as well as embedded engines for orientation, Directional-Tap
TM
/Double-
Tap
TM
, and Free fall detection. The sense element is fabricated using Kionix’s
proprietary plasma micromachining process technology. Acceleration sensing is
based on the principle of a differential capacitance arising from acceleration-
induced motion of the sense element, which further utilizes common mode
cancellation to decrease errors from process variation, temperature, and environmental stress. The sense element is
hermetically sealed at the wafer level by bonding a second silicon lid wafer to the device wafer. A separate ASIC device
packaged with the sense element provides signal conditioning and intelligent user-programmable application
algorithms. The KX132-1211 accelerometers offer lower noise and improved linearity over of the entire temperature
range. The accelerometer is delivered in a 2 x 2 x 0.9 mm LGA 12-pin plastic package operating from a 1.7V – 3.6V
(VDD) / 1.2V – 3.6V (IO_VDD) DC supplies. Internal voltage regulators are used to maintain constant internal operating
voltages over the range of input supply voltages. This results in stable operating characteristics even if the supply
voltage changes. I²C or SPI digital protocol is supported to configure the chip, read acceleration outputs, and check for
updates to the orientation, Directional-Tap
TM
/Double-Tap
TM
detection, Free fall detection, and activity monitoring
algorithms. Two configurable interrupt pins are also available to show the output of the embedded detection algorithms.
Features
• Operating temperature range from -40ºC to +105ºC
• Small footprint: 2 x 2 x 0.9 mm LGA 12-pin package
• User-configurable g-range up to ±16g and Output Data Rate
up to 25600Hz
• A user-configurable 3-stage Advanced Data Path (ADP)
consisting of a low-pass filter, low-pass/high-pass filter, and
RMS calculation engine.
• High resolution Wake-Up / Back-to-Sleep functions with
threshold configurable down to 3.9 mg
• User accessible manufacturer and part ID registers
• Self-test Function
• Integrated Free fall, Directional-Tap
TM
/ Double-Tap
TM
, and
Device-orientation algorithms
• Improved ODR accuracy in Low Power mode over
temperature
• Embedded 512-byte FIFO buffer continues to record data
even when being read
• User-selectable Low Power or High-Performance modes
• Internal voltage regulator
• Digital I
2
C up to 3.4MHz and Digital SPI up to 10MHz
• Excellent temperature performance with high shock
survivability
• RoHS / REACH compliant