Datasheet

± 8g / 16g / 32g / 64g Tri-axis
Digital Accelerometer
Specifications
PART NUMBER:
KX134-1211
Rev. 1.0
31-Jul-2019
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Application Schematic
Pin Description
Pin
Name
Description
1
SDO/ADDR
Serial Data Out pin during 4-wire SPI communication and part of the device address during I2C communication. Do not leave
floating.
2
SDI/SDA
SPI Data input / I2C Serial Data
3
IO_VDD
The power supply input for the digital communication bus. Optionally decouple this pin to ground with a 0.1uF ceramic
capacitor.
4
TRIG
Trigger pin for FIFO buffer control. Connect to GND when not using external trigger option.
5
INT1
Physical Interrupt 1 (Push-Pull). The pin is in High-Z state during POR and is driven LOW following POR. Leave floating if not
used.
6
INT2
Physical Interrupt 2 (Push-Pull). The pin is in High-Z state during POR and is driven LOW following POR. Leave floating if not
used.
7
VDD
The power supply input. Decouple this pin to ground with a 0.1uF ceramic capacitor.
8
GND
Ground
9
GND
Ground
10
nCS
Chip Select (active LOW) for SPI communication. Connect to IO_VDD for I2C communication. Do not leave floating.
11
NC
Not Internally Connected. Can be connected to VDD, IO_VDD, GND or leave floating.
12
SCLK/SCL
SPI and I2C Serial Clock
Table 4: Pin Description