Datasheet

Bosch Sensortec | BME680 Datasheet
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Modifications reserved |Data subject not change without notice | Printed in Germany
Document number: BST-BME680-DS001-00 Revision_1.0_072017
6.4.3 SPI timings
The SPI timing diagram is in Picture 10, while the corresponding values are given in Table 19. All timings apply both to 4-
and 3-wire SPI.
CSB
SCK
T_setup_csb
T_low_sck
T_high_sck
T_hold_csb
SDI
T_setup_sdi
T_hold_sdi
SDO
T_delay_sdo
Picture 10: SPI timing diagram
Table 19: SPI timings
Parameter
Symbol
Condition
Min
Typ
Max
Unit
SPI clock i/p frequency
F_spi
0
10
MHz
SCK low pulse
T_low_sck
20
ns
SCK high pulse
T_high_sck
20
ns
SDI setup time
T_setup_sdi
20
ns
SDI hold time
T_hold_sdi
20
ns
SDO output delay
T_delay_sdo
25 pF load, V
DDIO
=1.6 V min
30
ns
SDO output delay
T_delay_sdo
25 pF load, V
DDIO
=1.2 V min
40
ns
CSB setup time
T_setup_csb
20
ns
CSB hold time
T_hold_csb
20
ns
SPI clock input
frequency
F_spi
0
10
MHz