Datasheet
Bosch Sensortec | BME680 Datasheet
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Modifications reserved |Data subject not change without notice | Printed in Germany
Document number: BST-BME680-DS001-00 Revision_1.0_072017
6.4.2 I²C timings
For I²C timings, the following abbreviations are used:
“S&F mode” = standard and fast mode
“HS mode” = high speed mode
C
b
= bus capacitance on SDA line
All other naming refers to I²C specification 2.1 (January 2000).
The I²C timing diagram is in Picture 9. The corresponding values are given in Table 18
t
HDDAT
t
f
t
BUF
SDI
SCK
SDI
t
LOW
t
HDSTA
t
r
t
SUSTA
t
HIGH
t
SUDAT
t
SUSTO
Picture 9: I
2
C timing diagram
Table 18: I
2
C timings
Parameter
Symbol
Condition
Min
Typ
Max
Unit
SDI setup time
t
SU;DAT
S&F Mode
HS mode
160
30
ns
ns
SDI hold time
t
HD;DAT
S&F Mode, C
b
≤100 pF
S&F Mode, C
b
≤400 pF
HS mode, C
b
≤100 pF
HS mode, C
b
≤400 pF
80
90
18
24
115
150
ns
ns
ns
ns
SCK low pulse
t
LOW
HS mode, C
b
≤100 pF
V
DDIO
= 1.62 V
160
ns
SCK low pulse
t
LOW
HS mode, C
b
≤100 pF
V
DDIO
= 1.2 V
210
ns
The above-mentioned I
2
C specific timings correspond to the following internal added delays:
Input delay between SDI and SCK inputs: SDI is more delayed than SCK by typically 100 ns in Standard and Fast
Modes and by typically 20 ns in High Speed Mode.
Output delay from SCK falling edge to SDI output propagation is typically 140 ns in Standard and Fast Modes and
typically 70 ns in High Speed Mode.