Data Sheet

Document Number: DS-000189 Page 66 of 89
Revision: 1.3
5
187.5
121.2
214.9
3
281.3
178.9
319.3
N/A
1
562.5
351.7
N/A
Table 19. Accelerator Configuration 2
NOTE: Ton is the ON time for motion measurement when the accelerometer is in duty cycle mode.
10.17 FSYNC_CONFIG
Name: FSYNC_CONFIG
Address: 82 (52h)
Type: USR2
Bank: 2
Serial IF: R/W
Reset Value: 0x00
BIT NAME FUNCTION
7
DELAY_TIME_EN
0: Disables delay time measurement between FSYNC event and the first ODR event
(after FSYNC event).
1: Enables delay time measurement between FSYNC event and the first ODR event
(after FSYNC event).
6
-
Reserved.
5
WOF_DEGLITCH_EN
Enable digital deglitching of FSYNC input for Wake on FSYNC.
4
WOF_EDGE_INT
0: FSYNC is a level interrupt for Wake on FSYNC.
1: FSYNC is an edge interrupt for Wake on FSYNC.
ACTL_FSYNC is used to set the polarity of the interrupt.
3:0
EXT_SYNC_SET[3:0]
Enables the FSYNC pin data to be sampled.
EXT_SYNC_SET FSYNC bit location.
0: Function disabled.
1: TEMP_OUT_L[0].
2: GYRO_XOUT_L[0].
3: GYRO_YOUT_L[0].
4: GYRO_ZOUT_L[0].
5: ACCEL_XOUT_L[0].
6: ACCEL_YOUT_L[0].
7: ACCEL_ZOUT_L[0].