Data Sheet

ICM-20948
Document Number: DS-000189 Page 59 of 89
Revision: 1.3
10 USR BANK 2 REGISTER MAP
This section describes the function and contents of the User Bank 2 Register Map within the ICM-20948.
NOTE: The device will come up in sleep mode upon power-up.
10.1 GYRO_SMPLRT_DIV
Name: GYRO_SMPLRT_DIV
Address: 0 (00h)
Type: USR2
Bank: 2
Serial IF: R/W
Reset Value: 0x00
BIT NAME FUNCTION
7:0
GYRO_SMPLRT_DIV[7:0]
Gyro sample rate divider. Divides the internal sample rate to generate the sample
rate that controls sensor data output rate, FIFO sample rate, and DMP sequence rate.
NOTE: This register is only effective when FCHOICE = 1’b1 (FCHOICE_B register bit is 1’b0), and
(0 < DLPF_CFG < 7).
ODR is computed as follows:
1.1 kHz/(1+GYRO_SMPLRT_DIV[7:0])
10.2 GYRO_CONFIG_1
Name: GYRO_CONFIG_1
Address: 1 (01h)
Type: USR2
Bank: 2
Serial IF: R/W
Reset Value: 0x01
BIT
NAME
FUNCTION
7:6
-
Reserved.
5:3
GYRO_DLPFCFG[2:0]
Gyro low pass filter configuration as shown in Table 16.
2:1
GYRO_FS_SEL[1:0]
Gyro Full Scale Select:
00 = ±250 dps
01= ±500 dps
10 = ±1000 dps
11 = ±2000 dps
0
GYRO_FCHOICE
0 – Bypass gyro DLPF.
1 – Enable gyro DLPF.
The gyroscope DLPF is configured by GYRO_DLPFCFG, when GYRO_FCHOICE = 1. The gyroscope data is filtered
according to the value of GYRO_DLPFCFG and GYRO_FCHOICE as shown in Table 16.